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Searched refs:INTERRUPT_CONTROL__STREAM_3_INTERRUPT_ENABLE_MASK (Results 1 – 7 of 7) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_10_0_sh_mask.h12479 #define INTERRUPT_CONTROL__STREAM_3_INTERRUPT_ENABLE_MASK 0x8 macro
Ddce_11_0_sh_mask.h12485 #define INTERRUPT_CONTROL__STREAM_3_INTERRUPT_ENABLE_MASK 0x8 macro
Ddce_11_2_sh_mask.h13101 #define INTERRUPT_CONTROL__STREAM_3_INTERRUPT_ENABLE_MASK 0x8 macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_1_sh_mask.h93 #define INTERRUPT_CONTROL__STREAM_3_INTERRUPT_ENABLE_MASK … macro
Ddcn_3_5_1_sh_mask.h46647 #define INTERRUPT_CONTROL__STREAM_3_INTERRUPT_ENABLE_MASK … macro
Ddcn_3_5_0_sh_mask.h46668 #define INTERRUPT_CONTROL__STREAM_3_INTERRUPT_ENABLE_MASK … macro
Ddcn_4_1_0_sh_mask.h54405 #define INTERRUPT_CONTROL__STREAM_3_INTERRUPT_ENABLE_MASK … macro