Searched refs:INTEN (Results 1 – 12 of 12) sorted by relevance
| /linux-6.12.1/Documentation/sound/hd-audio/ |
| D | intel-multi-link.rst | 132 | INTEN | |
221 | INTEN |
291 … | INTEN | |
|
| /linux-6.12.1/drivers/scsi/ |
| D | aha152x.h | 225 #define INTEN 0x04 macro
|
| D | aha152x.c | 729 SETPORT(DMACNTRL0, INTEN); in swintr()
820 SETPORT(DMACNTRL0, SWINT|INTEN); in aha152x_probe_one()
831 SETPORT(DMACNTRL0, INTEN); in aha152x_probe_one()
919 SETBITS(DMACNTRL0, INTEN); in setup_expected_interrupts()
1368 CLRBITS(DMACNTRL0, INTEN); in intr()
2437 SETBITS(DMACNTRL0, INTEN); in is_complete()
2769 if (s & INTEN) in get_ports()
|
| /linux-6.12.1/drivers/dma/ |
| D | pl330.c | 74 #define INTEN 0x20 macro
978 u32 inten = readl(regs + INTEN); in _stop()
997 writel(inten & ~(1 << thrd->ev), regs + INTEN); in _stop()
1049 writel(readl(regs + INTEN) | (1 << thrd->ev), regs + INTEN); in _trigger()
1687 u32 inten = readl(regs + INTEN); in pl330_update()
|
| /linux-6.12.1/drivers/soc/mediatek/ |
| D | mtk-svs.c | 253 INTEN, enumerator
311 [INTEN] = 0x5c,
1255 svs_writel_relaxed(svsp, SVSB_INTEN_INIT0x, INTEN); in svs_set_bank_phase()
1261 svs_writel_relaxed(svsp, SVSB_INTEN_INIT0x, INTEN); in svs_set_bank_phase()
1269 svs_writel_relaxed(svsp, SVSB_INTEN_MONVOPEN, INTEN); in svs_set_bank_phase()
|
| /linux-6.12.1/drivers/gpu/drm/bridge/ |
| D | chrontel-ch7033.c | 60 INTEN = BIT(3), enumerator
|
| /linux-6.12.1/drivers/scsi/aic7xxx/ |
| D | aic7xxx_core.c | 727 if ((ahc->pause & INTEN) == 0) { in ahc_intr()
5534 hcntrl &= ~INTEN; in ahc_intr_enable()
5535 ahc->pause &= ~INTEN; in ahc_intr_enable()
5536 ahc->unpause &= ~INTEN; in ahc_intr_enable()
5538 hcntrl |= INTEN; in ahc_intr_enable()
5539 ahc->pause |= INTEN; in ahc_intr_enable()
5540 ahc->unpause |= INTEN; in ahc_intr_enable()
|
| D | aic79xx_core.c | 949 if ((ahd->pause & INTEN) == 0) { in ahd_intr()
7769 hcntrl &= ~INTEN; in ahd_intr_enable()
7770 ahd->pause &= ~INTEN; in ahd_intr_enable()
7771 ahd->unpause &= ~INTEN; in ahd_intr_enable()
7773 hcntrl |= INTEN; in ahd_intr_enable()
7774 ahd->pause |= INTEN; in ahd_intr_enable()
7775 ahd->unpause |= INTEN; in ahd_intr_enable()
|
| D | aic7xxx_reg.h_shipped | 630 #define INTEN 0x02
|
| D | aic7xxx.reg | 831 field INTEN 0x02
|
| D | aic79xx_reg.h_shipped | 444 #define INTEN 0x02
|
| D | aic79xx.reg | 270 field INTEN 0x02
|