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Searched refs:INTEL_PMC_IDX_FIXED_VLBR (Results 1 – 5 of 5) sorted by relevance

/linux-6.12.1/arch/x86/kvm/vmx/
Dpmu_intel.c239 __set_bit(INTEL_PMC_IDX_FIXED_VLBR, pmu->pmc_in_use); in intel_pmu_create_guest_lbr_event()
252 __set_bit(INTEL_PMC_IDX_FIXED_VLBR, pmu->pmc_in_use); in intel_pmu_create_guest_lbr_event()
285 __set_bit(INTEL_PMC_IDX_FIXED_VLBR, vcpu_to_pmu(vcpu)->pmc_in_use); in intel_pmu_handle_lbr_msrs_access()
289 clear_bit(INTEL_PMC_IDX_FIXED_VLBR, vcpu_to_pmu(vcpu)->pmc_in_use); in intel_pmu_handle_lbr_msrs_access()
552 bitmap_set(pmu->all_valid_pmc_idx, INTEL_PMC_IDX_FIXED_VLBR, 1); in intel_pmu_refresh()
684 if (test_bit(INTEL_PMC_IDX_FIXED_VLBR, pmu->pmc_in_use)) in vmx_passthrough_lbr_msrs()
691 __clear_bit(INTEL_PMC_IDX_FIXED_VLBR, pmu->pmc_in_use); in vmx_passthrough_lbr_msrs()
/linux-6.12.1/arch/x86/include/asm/
Dperf_event.h412 #define INTEL_PMC_IDX_FIXED_VLBR (GLOBAL_STATUS_LBRS_FROZEN_BIT) macro
/linux-6.12.1/arch/x86/events/intel/
Dlbr.c705 return test_bit(INTEL_PMC_IDX_FIXED_VLBR, in vlbr_exclude_host()
1702 __EVENT_CONSTRAINT(INTEL_FIXED_VLBR_EVENT, (1ULL << INTEL_PMC_IDX_FIXED_VLBR),
Dcore.c2567 case INTEL_PMC_IDX_FIXED_VLBR: in intel_pmu_disable_event()
2879 case INTEL_PMC_IDX_FIXED_VLBR: in intel_pmu_enable_event()
/linux-6.12.1/arch/x86/events/
Dcore.c1230 case INTEL_PMC_IDX_FIXED_VLBR: in x86_assign_hw_event()