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Searched refs:IMX8ULP_CLK_PLL4_PFD0_DIV2_GATE (Results 1 – 2 of 2) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Dimx8ulp-clock.h81 #define IMX8ULP_CLK_PLL4_PFD0_DIV2_GATE 14 macro
/linux-6.12.1/drivers/clk/imx/
Dclk-imx8ulp.c271 …clks[IMX8ULP_CLK_PLL4_PFD0_DIV2_GATE] = imx_clk_hw_gate_dis("pll4_pfd0_div2_gate", "pll4_pfd0", ba… in imx8ulp_clk_cgc2_init()