Searched refs:IMX8ULP_CLK_DDR_DIV (Results 1 – 2 of 2) sorted by relevance
71 #define IMX8ULP_CLK_DDR_DIV 4 macro
259 …clks[IMX8ULP_CLK_DDR_DIV] = imx_clk_hw_divider_flags("ddr_div", "ddr_sel", base + 0x40, 21, 6, CLK… in imx8ulp_clk_cgc2_init()