Searched refs:IMX7D_PLL_SYS_MAIN_240M_CLK (Results 1 – 10 of 10) sorted by relevance
144 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;152 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;161 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;169 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
280 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;288 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;297 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
322 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;339 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
204 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
198 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
467 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;475 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
347 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
607 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
22 #define IMX7D_PLL_SYS_MAIN_240M_CLK 13 macro
456 …hws[IMX7D_PLL_SYS_MAIN_240M_CLK] = imx_clk_hw_gate_dis("pll_sys_main_240m_clk", "pll_sys_main_240m… in imx7d_clocks_init()