Searched refs:IMX6QDL_CLK_PLL2_PFD0_352M (Results 1 – 4 of 4) sorted by relevance
406 <&clks IMX6QDL_CLK_PLL2_PFD0_352M>,407 <&clks IMX6QDL_CLK_PLL2_PFD0_352M>,408 <&clks IMX6QDL_CLK_PLL2_PFD0_352M>,409 <&clks IMX6QDL_CLK_PLL2_PFD0_352M>;
77 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL2_PFD0_352M>,78 <&clks IMX6QDL_CLK_PLL2_PFD0_352M>;
13 #define IMX6QDL_CLK_PLL2_PFD0_352M 4 macro
156 case IMX6QDL_CLK_PLL2_PFD0_352M: in ldb_di_sel_by_clock_id()577 …hws[IMX6QDL_CLK_PLL2_PFD0_352M] = imx_clk_hw_pfd("pll2_pfd0_352m", "pll2_bus", base + 0x100, 0… in imx6q_clocks_init()