Searched refs:IMX6QDL_CLK_PERIPH2_CLK2_SEL (Results 1 – 2 of 2) sorted by relevance
30 #define IMX6QDL_CLK_PERIPH2_CLK2_SEL 21 macro
275 clk_set_parent(hws[IMX6QDL_CLK_PERIPH2_CLK2_SEL]->clk, in mmdc_ch1_disable()616 …hws[IMX6QDL_CLK_PERIPH2_CLK2_SEL] = imx_clk_hw_mux("periph2_clk2_sel", base + 0x18, 20, 1, periph2… in imx6q_clocks_init()