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Searched refs:IMX6QDL_CLK_IPU1_DI0_PRE_SEL (Results 1 – 4 of 4) sorted by relevance

/linux-6.12.1/arch/arm/boot/dts/nxp/imx/
Dimx6q-logicpd.dts63 <&clks IMX6QDL_CLK_IPU1_DI0_PRE_SEL>,
Dimx6q-bx50v3.dtsi400 <&clks IMX6QDL_CLK_IPU1_DI0_PRE_SEL>,
/linux-6.12.1/include/dt-bindings/clock/
Dimx6qdl-clock.h44 #define IMX6QDL_CLK_IPU1_DI0_PRE_SEL 35 macro
/linux-6.12.1/drivers/clk/imx/
Dclk-imx6q.c663 …hws[IMX6QDL_CLK_IPU1_DI0_PRE_SEL] = imx_clk_hw_mux_flags("ipu1_di0_pre_sel", base + 0x34, 6, 3, i… in imx6q_clocks_init()
932 clk_set_parent(hws[IMX6QDL_CLK_IPU1_DI0_PRE_SEL]->clk, hws[IMX6QDL_CLK_PLL5_VIDEO_DIV]->clk); in imx6q_clocks_init()