Searched refs:High (Results 1 – 25 of 242) sorted by relevance
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46 - GP17 Strap "GP7"=High47 - GP16 Strap "GP6"=High56 - GP12 Strap "GP5" = High57 - GP11 Strap "GP4" = High58 - GP10 Strap "GP3" = High
73 power1_max High power threshold78 power1_max_alarm High power alarm83 temp1_max High temperature threshold88 temp1_max_alarm High temperature alarm92 temp2_max High temperature threshold for fan control94 temp2_max_alarm High temperature fan control alarm
14 * Aquacomputer High Flow Next sensor19 * Aquacomputer High Flow USB flow meter59 The High Flow Next exposes +5V voltages, water quality, conductivity and flow readings.78 The High Flow USB exposes an internal and external temperature sensor, and a flow meter.80 The MPS Flow devices expose the same entries as the High Flow USB because they have
86 power1_max High power threshold91 power1_max_alarm High power alarm
70 in2: High-Vt (high voltage threshold) 0.62V - 1.168V93 temp1_max RW High limit for temp input.110 in[0-3]_max RW High limit for voltage input.
387 ppage0_alloc->WWNN.High = in mptfc_GetFcDevPage0()388 le32_to_cpu(ppage0_alloc->WWNN.High); in mptfc_GetFcDevPage0()393 ppage0_alloc->WWPN.High = in mptfc_GetFcDevPage0()394 le32_to_cpu(ppage0_alloc->WWPN.High); in mptfc_GetFcDevPage0()450 rid->node_name = ((u64)pg0->WWNN.High) << 32 | (u64)pg0->WWNN.Low; in mptfc_generate_rport_ids()451 rid->port_name = ((u64)pg0->WWPN.High) << 32 | (u64)pg0->WWPN.Low; in mptfc_generate_rport_ids()478 pn = (u64)ri->pg0.WWPN.High << 32 | (u64)ri->pg0.WWPN.Low; in mptfc_register_dev()520 pn = (u64)ri->pg0.WWPN.High << 32 | (u64)ri->pg0.WWPN.Low; in mptfc_register_dev()521 nn = (u64)ri->pg0.WWNN.High << 32 | (u64)ri->pg0.WWNN.Low; in mptfc_register_dev()612 pn = (u64)ri->pg0.WWPN.High << 32 | (u64)ri->pg0.WWPN.Low; in mptfc_dump_lun_info()[all …]
3 The High level CI API14 With the High Level CI approach any new card with almost any random65 With this High Level CI interface, the interface can be defined with the68 All these ioctls are also valid for the High level CI interface89 APP: CI High level interface139 | | | High Level CI driver156 The High Level CI interface uses the EN50221 DVB standard, following a
59 S32 High; member65 U32 High; member
2 High Precision Event Timer Driver for Linux5 The High Precision Event Timer (HPET) hardware follows a specification8 Each HPET has one fixed-rate counter (at 10+ MHz, hence "High Precision")
9 tristate "Analog Devices ADMV8818 High-Pass and Low-Pass Filter"14 2 GHz to 18 GHz, Digitally Tunable, High-Pass and Low-Pass Filter.
151 * - YUAN High-Tech DiBcom STK7700D153 * - YUAN High-Tech MC770155 * - YUAN High-Tech STK7700D157 * - YUAN High-Tech STK7700PH
32 Enable/Disable ASPEED's High quality mode. This is a private control47 Define the quality of ASPEED's High quality mode. This is a private control48 that can be used to decide compression quality if High quality mode enabled
3 # IEC 62439-3 High-availability Seamless Redundancy7 tristate "High-availability Seamless Redundancy (HSR & PRP)"9 This enables IEC 62439 defined High-availability Seamless
132 :title: ITU-T Rec. H.265 | ISO/IEC 23008-2 "High Efficiency Video Coding"193 :title: SMPTE 240M-1999 "Television - Signal Parameters - 1125-Line High-Definition Production"213 :title: SMPTE ST 2084:2014 "High Dynamic Range Electro-Optical Transfer Function of Master Refe…323 :title: A DTV Profile for Uncompressed High Speed Digital Interfaces365 :title: High-bandwidth Digital Content Protection System376 :title: High-Definition Multimedia Interface386 :title: High-Definition Multimedia Interface
4 tristate "MediaTek High-Speed DMA controller support"9 Enable support for High-Speed DMA controller on MediaTek
89 /* On High speed expansion */101 /* On High speed expansion */
64 * High: RS-48582 * High: SD
4 * High Precision Event Timer (HPET)
166 /* High watermark of RSS usage in duration of a task, in KBytes. */167 __u64 hiwater_rss; /* High-watermark of RSS usage */169 /* High watermark of VM usage in duration of a task, in KBytes. */170 __u64 hiwater_vm; /* High-water virtual memory usage */
1 * NXP LPC32xx SoC High Speed UART
12 Enable this to support ZynqMP High Speed Gigabit Transceiver
1 High Speed Synchronous Serial Interface (HSI)7 High Speed Synchronous Interface (HSI) is a full duplex, low latency protocol,
8 The "High speed synchronous Serial Interface" is
1 SMSC USB4604 High-Speed Hub Controller
173 This should be set for devices which insert an HSR (High-availability Seamless178 This should be set for devices which remove HSR (High-availability Seamless183 This should be set for devices which forward HSR (High-availability Seamless188 This should be set for devices which duplicate outgoing HSR (High-availability