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Searched refs:HNS3_PMU_REG_EVENT_CTRL_LOW (Results 1 – 1 of 1) sorted by relevance

/linux-6.12.1/drivers/perf/hisilicon/
Dhns3_pmu.c37 #define HNS3_PMU_REG_EVENT_CTRL_LOW 0x00 macro
1144 hns3_pmu_writel(hns3_pmu, HNS3_PMU_REG_EVENT_CTRL_LOW, idx, val); in hns3_pmu_config_filter()
1159 val = hns3_pmu_readl(hns3_pmu, HNS3_PMU_REG_EVENT_CTRL_LOW, idx); in hns3_pmu_enable_counter()
1161 hns3_pmu_writel(hns3_pmu, HNS3_PMU_REG_EVENT_CTRL_LOW, idx, val); in hns3_pmu_enable_counter()
1170 val = hns3_pmu_readl(hns3_pmu, HNS3_PMU_REG_EVENT_CTRL_LOW, idx); in hns3_pmu_disable_counter()
1172 hns3_pmu_writel(hns3_pmu, HNS3_PMU_REG_EVENT_CTRL_LOW, idx, val); in hns3_pmu_disable_counter()
1201 val = hns3_pmu_readl(hns3_pmu, HNS3_PMU_REG_EVENT_CTRL_LOW, idx); in hns3_pmu_clear_intr_status()
1203 hns3_pmu_writel(hns3_pmu, HNS3_PMU_REG_EVENT_CTRL_LOW, idx, val); in hns3_pmu_clear_intr_status()
1205 val = hns3_pmu_readl(hns3_pmu, HNS3_PMU_REG_EVENT_CTRL_LOW, idx); in hns3_pmu_clear_intr_status()
1207 hns3_pmu_writel(hns3_pmu, HNS3_PMU_REG_EVENT_CTRL_LOW, idx, val); in hns3_pmu_clear_intr_status()