Searched refs:HI6220_PLL1_DDR_GATE (Results 1 – 2 of 2) sorted by relevance
164 #define HI6220_PLL1_DDR_GATE 2 macro
257 …{ HI6220_PLL1_DDR_GATE, "pll1_ddr_gate", "ddrpll1", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x1…