Searched refs:HHI_HDMI_CLK_CNTL (Results 1 – 8 of 8) sorted by relevance
| /linux-6.12.1/drivers/gpu/drm/meson/ |
| D | meson_vclk.c | 89 #define HHI_HDMI_CLK_CNTL 0x1cc /* 0x73 offset in data sheet */ macro
817 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, in meson_vclk_set()
819 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, in meson_vclk_set()
821 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, in meson_vclk_set()
898 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, in meson_vclk_set()
907 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, in meson_vclk_set()
916 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, in meson_vclk_set()
925 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, in meson_vclk_set()
934 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, in meson_vclk_set()
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| D | meson_dw_hdmi.c | 106 #define HHI_HDMI_CLK_CNTL 0x1cc /* 0x73 */ macro
617 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, 0xffff, 0x100); in meson_dw_hdmi_init()
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| /linux-6.12.1/drivers/clk/meson/ |
| D | meson8b.h | 45 #define HHI_HDMI_CLK_CNTL 0x1cc /* 0x73 offset in data sheet */ macro
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| D | gxbb.h | 57 #define HHI_HDMI_CLK_CNTL 0x1CC /* 0x73 offset in data sheet */ macro
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| D | g12a.h | 75 #define HHI_HDMI_CLK_CNTL 0x1CC macro
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| D | gxbb.c | 2319 .offset = HHI_HDMI_CLK_CNTL,
2414 .offset = HHI_HDMI_CLK_CNTL,
2430 .offset = HHI_HDMI_CLK_CNTL,
2445 .offset = HHI_HDMI_CLK_CNTL,
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| D | meson8b.c | 1708 .offset = HHI_HDMI_CLK_CNTL,
1809 .offset = HHI_HDMI_CLK_CNTL,
1830 .offset = HHI_HDMI_CLK_CNTL,
1847 .offset = HHI_HDMI_CLK_CNTL,
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| D | g12a.c | 3626 .offset = HHI_HDMI_CLK_CNTL,
3864 .offset = HHI_HDMI_CLK_CNTL,
3880 .offset = HHI_HDMI_CLK_CNTL,
3895 .offset = HHI_HDMI_CLK_CNTL,
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