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Searched refs:HCLK_VPU (Results 1 – 17 of 17) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Drv1108-cru.h164 #define HCLK_VPU 345 macro
166 #define CLK_NR_CLKS (HCLK_VPU + 1)
Drk3228-cru.h133 #define HCLK_VPU 464 macro
Drk3328-cru.h188 #define HCLK_VPU 326 macro
Dpx30-cru.h120 #define HCLK_VPU 244 macro
Drockchip,rk3588-cru.h449 #define HCLK_VPU 434 macro
Drk3568-cru.h303 #define HCLK_VPU 239 macro
/linux-6.12.1/arch/arm/boot/dts/rockchip/
Drk322x.dtsi232 <&cru HCLK_VPU>;
625 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
635 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
/linux-6.12.1/arch/arm64/boot/dts/rockchip/
Drk3328.dtsi348 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
670 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
681 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
691 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
Dpx30.dtsi308 <&cru HCLK_VPU>,
1106 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
1116 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
Drk356x.dtsi642 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
653 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
Drk3588-base.dtsi1134 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
1145 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
/linux-6.12.1/drivers/clk/rockchip/
Dclk-rk3228.c632 GATE(HCLK_VPU, "hclk_vpu", "hclk_vpu_pre", 0, RK2928_CLKGATE_CON(15), 1, GFLAGS),
Dclk-rv1108.c258 GATE(HCLK_VPU, "hclk_vpu", "hclk_rkvdec_pre", 0,
Dclk-rk3328.c529 GATE(HCLK_VPU, "hclk_vpu", "hclk_vpu_pre", CLK_SET_RATE_PARENT,
Dclk-px30.c873 GATE(HCLK_VPU, "hclk_vpu", "hclk_vpu_pre", 0, PX30_CLKGATE_CON(4), 6, GFLAGS),
Dclk-rk3568.c1099 GATE(HCLK_VPU, "hclk_vpu", "hclk_vpu_pre", 0,
Dclk-rk3588.c1729 GATE(HCLK_VPU, "hclk_vpu", "hclk_vdpu_root", 0,