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Searched refs:HCLK_SPDIF (Results 1 – 14 of 14) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Drk3188-cru-common.h113 #define HCLK_SPDIF 453 macro
Drk3128-cru.h122 #define HCLK_SPDIF 440 macro
Drk3368-cru.h170 #define HCLK_SPDIF 464 macro
Drk3288-cru.h181 #define HCLK_SPDIF 463 macro
Drk3399-cru.h311 #define HCLK_SPDIF 471 macro
/linux-6.12.1/drivers/clk/rockchip/
Dclk-rk3128.c489 GATE(HCLK_SPDIF, "hclk_spdif", "hclk_peri", 0, RK2928_CLKGATE_CON(10), 9, GFLAGS),
Dclk-rk3188.c454 GATE(HCLK_SPDIF, "hclk_spdif", "hclk_cpu", 0, RK2928_CLKGATE_CON(7), 1, GFLAGS),
Dclk-rk3368.c690 GATE(HCLK_SPDIF, "hclk_spdif", "hclk_bus", 0, RK3368_CLKGATE_CON(12), 10, GFLAGS),
Dclk-rk3288.c679 GATE(HCLK_SPDIF, "hclk_spdif", "hclk_cpu", 0, RK3288_CLKGATE_CON(10), 10, GFLAGS),
Dclk-rk3399.c1025 GATE(HCLK_SPDIF, "hclk_spdif", "hclk_perilp1", 0, RK3399_CLKGATE_CON(34), 3, GFLAGS),
/linux-6.12.1/arch/arm/boot/dts/rockchip/
Drk3188.dtsi185 clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF>;
Drk3128.dtsi442 clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF>;
/linux-6.12.1/arch/arm64/boot/dts/rockchip/
Drk3368.dtsi790 clocks = <&cru SCLK_SPDIF_8CH>, <&cru HCLK_SPDIF>;
Drk3399-base.dtsi1768 clocks = <&cru SCLK_SPDIF_8CH>, <&cru HCLK_SPDIF>;