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Searched refs:HCLK_ISP (Results 1 – 16 of 16) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Drv1108-cru.h155 #define HCLK_ISP 336 macro
Drk3368-cru.h174 #define HCLK_ISP 469 macro
Drk3288-cru.h187 #define HCLK_ISP 469 macro
Dpx30-cru.h126 #define HCLK_ISP 250 macro
Drockchip,rk3576-cru.h383 #define HCLK_ISP 365 macro
Drockchip,rv1126-cru.h285 #define HCLK_ISP 221 macro
Drk3568-cru.h275 #define HCLK_ISP 211 macro
/linux-6.12.1/arch/arm64/boot/dts/rockchip/
Drk3368.dtsi665 <&cru HCLK_ISP>,
842 clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>;
Dpx30.dtsi335 <&cru HCLK_ISP>,
1253 <&cru HCLK_ISP>,
1278 clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>;
/linux-6.12.1/drivers/clk/rockchip/
Dclk-rv1108.c479 GATE(HCLK_ISP, "hclk_isp", "hclk_vio_pre", 0,
Dclk-rk3368.c734 GATE(HCLK_ISP, "hclk_isp", "sclk_isp", 0, RK3368_CLKGATE_CON(16), 14, GFLAGS),
Dclk-rk3288.c791 GATE(HCLK_ISP, "hclk_isp", "hclk_vio", 0, RK3288_CLKGATE_CON(16), 1, GFLAGS),
Dclk-px30.c812 GATE(HCLK_ISP, "hclk_isp", "hclk_vi_pre", 0, PX30_CLKGATE_CON(5), 4, GFLAGS),
Dclk-rk3568.c1023 GATE(HCLK_ISP, "hclk_isp", "hclk_vi", 0,
Dclk-rk3576.c1065 GATE(HCLK_ISP, "hclk_isp", "hclk_vi_root", 0,
/linux-6.12.1/arch/arm/boot/dts/rockchip/
Drk3288.dtsi788 <&cru HCLK_ISP>,
1010 clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>;