| /linux-6.12.1/include/dt-bindings/clock/ |
| D | rk3128-cru.h | 139 #define HCLK_IEP 468 macro
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| D | rk3228-cru.h | 137 #define HCLK_IEP 468 macro
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| D | rv1108-cru.h | 153 #define HCLK_IEP 334 macro
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| D | rk3368-cru.h | 173 #define HCLK_IEP 468 macro
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| D | rk3288-cru.h | 186 #define HCLK_IEP 468 macro
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| D | rk3328-cru.h | 200 #define HCLK_IEP 339 macro
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| D | rockchip,rv1126-cru.h | 283 #define HCLK_IEP 219 macro
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| D | rk3399-cru.h | 317 #define HCLK_IEP 477 macro
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| D | rk3568-cru.h | 311 #define HCLK_IEP 247 macro
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| /linux-6.12.1/drivers/clk/rockchip/ |
| D | clk-rk3128.c | 470 GATE(HCLK_IEP, "hclk_iep", "hclk_vio", 0, RK2928_CLKGATE_CON(9), 7, GFLAGS),
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| D | clk-rk3228.c | 544 GATE(HCLK_IEP, "hclk_iep", "hclk_vio_pre", 0, RK2928_CLKGATE_CON(13), 3, GFLAGS),
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| D | clk-rv1108.c | 450 GATE(HCLK_IEP, "hclk_iep", "hclk_vio_pre", 0,
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| D | clk-rk3328.c | 716 GATE(HCLK_IEP, "hclk_iep", "hclk_vio_pre", 0, RK3328_CLKGATE_CON(21), 7, GFLAGS),
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| D | clk-rk3368.c | 742 GATE(HCLK_IEP, "hclk_iep", "hclk_vio", 0, RK3368_CLKGATE_CON(16), 3, GFLAGS),
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| D | clk-rk3288.c | 790 GATE(HCLK_IEP, "hclk_iep", "hclk_vio", 0, RK3288_CLKGATE_CON(15), 3, GFLAGS),
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| D | clk-rv1126.c | 759 GATE(HCLK_IEP, "hclk_iep", "hclk_pdvo", 0,
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| D | clk-rk3399.c | 786 GATE(HCLK_IEP, "hclk_iep", "hclk_iep_pre", 0,
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| D | clk-rk3568.c | 1121 GATE(HCLK_IEP, "hclk_iep", "hclk_rga_pre", 0,
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| /linux-6.12.1/arch/arm/boot/dts/rockchip/ |
| D | rk322x.dtsi | 209 <&cru HCLK_IEP>,
713 clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
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| D | rv1126.dtsi | 217 <&cru HCLK_IEP>,
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| D | rk3288.dtsi | 787 <&cru HCLK_IEP>,
1000 clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
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| D | rk3128.dtsi | 215 <&cru HCLK_IEP>,
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| /linux-6.12.1/arch/arm64/boot/dts/rockchip/ |
| D | rk3368.dtsi | 664 <&cru HCLK_IEP>,
830 clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
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| D | rk3399-base.dtsi | 1160 <&cru HCLK_IEP>;
1482 clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
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