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Searched refs:HCLK_HOST0 (Results 1 – 18 of 18) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Drk3228-cru.h140 #define HCLK_HOST0 471 macro
Drv1108-cru.h158 #define HCLK_HOST0 339 macro
Drk3368-cru.h158 #define HCLK_HOST0 450 macro
Drk3328-cru.h195 #define HCLK_HOST0 334 macro
Drk3399-cru.h296 #define HCLK_HOST0 456 macro
Drockchip,rk3588-cru.h413 #define HCLK_HOST0 398 macro
/linux-6.12.1/arch/arm/boot/dts/rockchip/
Drv1108.dtsi504 clocks = <&cru HCLK_HOST0>, <&u2phy>;
514 clocks = <&cru HCLK_HOST0>, <&u2phy>;
Drk322x.dtsi821 clocks = <&cru HCLK_HOST0>, <&u2phy0>;
831 clocks = <&cru HCLK_HOST0>, <&u2phy0>;
/linux-6.12.1/drivers/clk/rockchip/
Dclk-rk3228.c563 GATE(HCLK_HOST0, "hclk_host0", "hclk_peri", 0, RK2928_CLKGATE_CON(11), 6, GFLAGS),
Dclk-rv1108.c739 GATE(HCLK_HOST0, "hclk_host0", "hclk_periph", 0, RV1108_CLKGATE_CON(15), 6, GFLAGS),
Dclk-rk3328.c735 GATE(HCLK_HOST0, "hclk_host0", "hclk_peri", 0, RK3328_CLKGATE_CON(19), 6, GFLAGS),
Dclk-rk3368.c782 GATE(HCLK_HOST0, "hclk_host0", "hclk_peri", 0, RK3368_CLKGATE_CON(20), 3, GFLAGS),
Dclk-rk3399.c861 GATE(HCLK_HOST0, "hclk_host0", "hclk_perihp", 0,
Dclk-rk3588.c2371 GATE(HCLK_HOST0, "hclk_host0", "hclk_usb", 0,
/linux-6.12.1/arch/arm64/boot/dts/rockchip/
Drk3328.dtsi1028 clocks = <&cru HCLK_HOST0>, <&u2phy>;
1038 clocks = <&cru HCLK_HOST0>, <&u2phy>;
Drk3588-base.dtsi488 clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST_ARB0>, <&cru ACLK_USB>, <&u2phy2>;
499 clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST_ARB0>, <&cru ACLK_USB>, <&u2phy2>;
1084 <&cru HCLK_HOST0>,
Drk3368.dtsi502 clocks = <&cru HCLK_HOST0>;
Drk3399-base.dtsi442 clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>,
453 clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>,