/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
D | display_mode_vba_util_32.h | 127 unsigned int HActive[], 173 unsigned int HActive[], 218 unsigned int HActive, 258 unsigned int HActive, 294 unsigned int HActive, 316 unsigned int HActive, 324 unsigned int HActive,
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D | display_mode_vba_util_32.c | 438 unsigned int HActive[], in dml32_CalculateSwathAndDETConfiguration() 501 HActive, in dml32_CalculateSwathAndDETConfiguration() 705 unsigned int HActive[], in dml32_CalculateSwathWidth() 754 dml_round(HActive[k] / 4.0 * HRatio[k])); in dml32_CalculateSwathWidth() 757 dml_round(HActive[k] / 2.0 * HRatio[k])); in dml32_CalculateSwathWidth() 766 dml_print("DML::%s: k=%d HActive=%d\n", __func__, k, HActive[k]); in dml32_CalculateSwathWidth() 1183 unsigned int HActive, in dml32_CalculateODMMode() argument 1232 (DSCEnable && (HActive > 2 * MaximumPixelsPerLinePerDSCUnit)) in dml32_CalculateODMMode() 1244 (DSCEnable && (HActive > MaximumPixelsPerLinePerDSCUnit)) in dml32_CalculateODMMode() 1259 if (OutFormat == dm_420 && HActive > DCN32_MAX_FMT_420_BUFFER_WIDTH && in dml32_CalculateODMMode() [all …]
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D | display_mode_vba_32.c | 191 mode_lib->vba.HActive, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 271 mode_lib->vba.HActive, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 367 mode_lib->vba.HActive[k], mode_lib->vba.HTotal[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 778 …eepPrefetchParametersWatermarksAndPerformanceCalculation.myPipe.HActive = mode_lib->vba.HActive[k]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1999 mode_lib->vba.HActive, in dml32_ModeSupportAndSystemConfigurationFull() 2043 mode_lib->vba.HActive[k], in dml32_ModeSupportAndSystemConfigurationFull() 2066 mode_lib->vba.HActive[k], in dml32_ModeSupportAndSystemConfigurationFull() 2096 mode_lib->vba.HActive[k], in dml32_ModeSupportAndSystemConfigurationFull() 2422 mode_lib->vba.HActive[k], mode_lib->vba.AudioSampleRate[k], in dml32_ModeSupportAndSystemConfigurationFull() 2493 if (mode_lib->vba.HActive[k] in dml32_ModeSupportAndSystemConfigurationFull() [all …]
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
D | display_mode_vba_314.c | 566 int HActive[], 599 int HActive[], 2203 v->HActive, 2279 dml_ceil((double) v->HActive[k] / v->NumberOfDSCSlices[k], 1), 2288 dml_ceil((double) v->HActive[k] / v->NumberOfDSCSlices[k], 1), 2297 dml_ceil((double) v->HActive[k] / v->NumberOfDSCSlices[k], 1), 2302 …Delay[k] = v->DSCDelay[k] + (v->HTotal[k] - v->HActive[k]) * dml_ceil((double) v->DSCDelay[k] / v-… 3349 v->HActive, 3693 int HActive, argument 4136 v->HActive, [all …]
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
D | display_mode_vba_31.c | 558 int HActive[], 591 int HActive[], 2185 v->HActive, 2261 dml_ceil((double) v->HActive[k] / v->NumberOfDSCSlices[k], 1), 2270 dml_ceil((double) v->HActive[k] / v->NumberOfDSCSlices[k], 1), 2279 dml_ceil((double) v->HActive[k] / v->NumberOfDSCSlices[k], 1), 3331 v->HActive, 3587 int HActive, argument 4046 v->HActive, 4100 if (v->HActive[k] / 2 > DCN31_MAX_FMT_420_BUFFER_WIDTH) [all …]
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/ |
D | display_mode_core.c | 82 dml_uint_t HActive, 105 dml_uint_t HActive, 377 dml_uint_t HActive, 448 dml_uint_t HActive, 603 dml_uint_t HActive[], 738 dml_uint_t HActive, 1123 …1to2 || p->myPipe->ODMMode == dml_odm_mode_mso_1to2) ? (dml_float_t)p->myPipe->HActive / 2.0 : 0) + in CalculatePrefetchSchedule() 1124 …((p->myPipe->ODMMode == dml_odm_mode_mso_1to4) ? (dml_float_t)p->myPipe->HActive * 3.0 / 4.0 : 0),… in CalculatePrefetchSchedule() 2708 dml_uint_t HActive, in TruncToValidBPP() argument 4133 p->HActive, in CalculateSwathAndDETConfiguration() [all …]
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D | dml2_utils.c | 43 dml_timing_array->HActive[dst_index] = dml_timing_array->HActive[src_index]; in dml2_util_copy_dml_timing()
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D | display_mode_core_structs.h | 416 dml_uint_t HActive; member 554 dml_uint_t HActive[__DML_NUM_PLANES__]; member 1444 dml_uint_t *HActive; member
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D | dml_display_rq_dlg_calc.c | 212 dml_uint_t hactive = timing->HActive[plane_idx]; in dml_rq_dlg_get_dlg_reg()
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D | display_mode_util.c | 532 dml_print("DML: timing_cfg: plane=%d, HActive = %d\n", i, timing->HActive[i]); in dml_print_dml_display_cfg_timing()
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D | dml2_translation_helper.c | 712 …out->HActive[location] = in->timing.h_addressable + in->timing.h_border_left + in->timing.h_border… in populate_dml_timing_cfg_from_stream_state()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
D | display_mode_vba_30.c | 573 int HActive[], 606 unsigned int HActive[], 2064 v->HActive, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2139 dml_ceil((double) v->HActive[k] / v->NumberOfDSCSlices[k], 1), in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2147 dml_ceil((double) v->HActive[k] / v->NumberOfDSCSlices[k], 1), in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2155 dml_ceil((double) v->HActive[k] / v->NumberOfDSCSlices[k], 1), in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 3111 mode_lib->vba.HActive, in DisplayPipeConfiguration() 3452 long HActive, in TruncToValidBPP() argument 3843 v->HActive, in dml30_ModeSupportAndSystemConfigurationFull() 3901 if (v->DSCEnabled[k] && v->HActive[k] > DCN30_MAX_DSC_IMAGE_WIDTH in dml30_ModeSupportAndSystemConfigurationFull() [all …]
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/ |
D | dml2_core_dcn4_calcs.c | 1284 unsigned int HActive, in TruncToValidBPP() argument 3906 static enum dml2_odm_mode DecideODMMode(unsigned int HActive, in DecideODMMode() argument 3931 (HActive <= 1 * MaximumPixelsPerLinePerDSCUnit) ? dml2_odm_mode_bypass : in DecideODMMode() 3932 (HActive <= 2 * MaximumPixelsPerLinePerDSCUnit) ? dml2_odm_mode_combine_2to1 : in DecideODMMode() 3933 …(HActive <= 3 * MaximumPixelsPerLinePerDSCUnit) ? dml2_odm_mode_combine_3to1 : dml2_odm_mode_combi… in DecideODMMode() 3940 (HActive <= 1 * DML2_MAX_FMT_420_BUFFER_WIDTH) ? dml2_odm_mode_bypass : in DecideODMMode() 3941 (HActive <= 2 * DML2_MAX_FMT_420_BUFFER_WIDTH) ? dml2_odm_mode_combine_2to1 : in DecideODMMode() 3942 …(HActive <= 3 * DML2_MAX_FMT_420_BUFFER_WIDTH) ? dml2_odm_mode_combine_3to1 : dml2_odm_mode_combin… in DecideODMMode() 4003 unsigned int HActive, in ValidateODMMode() argument 4027 if (HActive % (NumberOfDPPRequired * pixels_per_clock_cycle)) in ValidateODMMode() [all …]
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D | dml2_core_shared.c | 120 unsigned int HActive, 372 unsigned int HActive, 396 unsigned int HActive, 434 unsigned int HActive, 442 unsigned int HActive, 2311 …myPipe->HActive = display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].… in dml2_core_shared_mode_support() 3961 unsigned int HActive, in TruncToValidBPP() argument 6553 unsigned int HActive, in CalculateODMMode() argument 6610 …(SurfaceRequiredDISPCLKWithODMCombineThreeToOne > MaxDispclk || (DSCEnable && (HActive > 3 * Maxim… in CalculateODMMode() 6620 (DSCEnable && (HActive > 2 * MaximumPixelsPerLinePerDSCUnit))))) { in CalculateODMMode() [all …]
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D | dml2_core_shared_types.h | 121 unsigned int HActive; member
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/ |
D | display_mode_structs.h | 116 unsigned int HActive; member
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D | display_mode_vba.h | 496 unsigned int HActive[DC__NUM_DPP__MAX]; member
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D | display_mode_vba.c | 617 mode_lib->vba.HActive[mode_lib->vba.NumberOfActivePlanes] = dst->hactive; in fetch_pipe_params()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
D | display_mode_vba_20v2.c | 1410 mode_lib->vba.HActive[k] / 2.0 in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1851 (double) mode_lib->vba.HActive[k] in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1865 (double) mode_lib->vba.HActive[k] in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2938 mode_lib->vba.HActive[k] / 2.0 * mode_lib->vba.HRatio[k]); in dml20v2_DisplayPipeConfiguration() 4017 } else if (locals->DSCEnabled[k] && (locals->HActive[k] > DCN20_MAX_DSC_IMAGE_WIDTH)) { in dml20v2_ModeSupportAndSystemConfigurationFull() 4020 … } else if (locals->HActive[k] > DCN20_MAX_420_IMAGE_WIDTH && locals->OutputFormat[k] == dm_420) { in dml20v2_ModeSupportAndSystemConfigurationFull() 4120 …if (dml_min(locals->SwathWidthYSingleDPP[k], dml_round(mode_lib->vba.HActive[k] / 2.0 * mode_lib->… in dml20v2_ModeSupportAndSystemConfigurationFull() 4387 mode_lib->vba.HActive[k] in dml20v2_ModeSupportAndSystemConfigurationFull() 4399 dml_ceil(mode_lib->vba.HActive[k] / mode_lib->vba.slices, 1.0), in dml20v2_ModeSupportAndSystemConfigurationFull() 4425 …te[i][j][k] = dml_min(locals->SwathWidthYSingleDPP[k], dml_round(locals->HActive[k] / 2 * locals->… in dml20v2_ModeSupportAndSystemConfigurationFull()
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D | display_mode_vba_20.c | 1350 mode_lib->vba.HActive[k] / 2.0 in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1815 (double) mode_lib->vba.HActive[k] in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1829 (double) mode_lib->vba.HActive[k] in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2865 mode_lib->vba.HActive[k] / 2.0 * mode_lib->vba.HRatio[k]); in dml20_DisplayPipeConfiguration() 3906 … } else if (locals->HActive[k] > DCN20_MAX_420_IMAGE_WIDTH && locals->OutputFormat[k] == dm_420) { in dml20_ModeSupportAndSystemConfigurationFull() 4006 …if (dml_min(locals->SwathWidthYSingleDPP[k], dml_round(mode_lib->vba.HActive[k] / 2.0 * mode_lib->… in dml20_ModeSupportAndSystemConfigurationFull() 4266 mode_lib->vba.HActive[k] in dml20_ModeSupportAndSystemConfigurationFull() 4278 dml_ceil(mode_lib->vba.HActive[k] / mode_lib->vba.slices, 1.0), in dml20_ModeSupportAndSystemConfigurationFull() 4304 …te[i][j][k] = dml_min(locals->SwathWidthYSingleDPP[k], dml_round(locals->HActive[k] / 2 * locals->… in dml20_ModeSupportAndSystemConfigurationFull()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
D | display_mode_vba_21.c | 1703 mode_lib->vba.HActive[k] / 2.0 in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1807 (double) mode_lib->vba.HActive[k] in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1821 (double) mode_lib->vba.HActive[k] in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2963 mode_lib->vba.HActive[k] / 2.0 * mode_lib->vba.HRatio[k]); in DisplayPipeConfiguration() 4111 } else if (locals->DSCEnabled[k] && (locals->HActive[k] > DCN21_MAX_DSC_IMAGE_WIDTH)) { in dml21_ModeSupportAndSystemConfigurationFull() 4114 … } else if (locals->HActive[k] > DCN21_MAX_420_IMAGE_WIDTH && locals->OutputFormat[k] == dm_420) { in dml21_ModeSupportAndSystemConfigurationFull() 4214 …if (dml_min(locals->SwathWidthYSingleDPP[k], dml_round(mode_lib->vba.HActive[k] / 2.0 * mode_lib->… in dml21_ModeSupportAndSystemConfigurationFull() 4481 mode_lib->vba.HActive[k] in dml21_ModeSupportAndSystemConfigurationFull() 4493 dml_ceil(mode_lib->vba.HActive[k] / mode_lib->vba.slices, 1.0), in dml21_ModeSupportAndSystemConfigurationFull() 4541 …dml_min(locals->SwathWidthYSingleDPP[k], dml_round(mode_lib->vba.HActive[k] / 2.0 * mode_lib->vba.… in dml21_ModeSupportAndSystemConfigurationFull()
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