Searched refs:HAL_REO_CMD_HDR_INFO0_STATUS_REQUIRED (Results 1 – 4 of 4) sorted by relevance
35 desc->cmd.info0 &= ~cpu_to_le32(HAL_REO_CMD_HDR_INFO0_STATUS_REQUIRED); in ath12k_hal_reo_cmd_queue_stats()37 desc->cmd.info0 |= cpu_to_le32(HAL_REO_CMD_HDR_INFO0_STATUS_REQUIRED); in ath12k_hal_reo_cmd_queue_stats()68 desc->cmd.info0 &= ~cpu_to_le32(HAL_REO_CMD_HDR_INFO0_STATUS_REQUIRED); in ath12k_hal_reo_cmd_flush_cache()70 desc->cmd.info0 |= cpu_to_le32(HAL_REO_CMD_HDR_INFO0_STATUS_REQUIRED); in ath12k_hal_reo_cmd_flush_cache()106 desc->cmd.info0 &= ~cpu_to_le32(HAL_REO_CMD_HDR_INFO0_STATUS_REQUIRED); in ath12k_hal_reo_cmd_update_rx_queue()108 desc->cmd.info0 |= cpu_to_le32(HAL_REO_CMD_HDR_INFO0_STATUS_REQUIRED); in ath12k_hal_reo_cmd_update_rx_queue()
1156 #define HAL_REO_CMD_HDR_INFO0_STATUS_REQUIRED BIT(16) macro
35 desc->cmd.info0 &= ~HAL_REO_CMD_HDR_INFO0_STATUS_REQUIRED; in ath11k_hal_reo_cmd_queue_stats()37 desc->cmd.info0 |= HAL_REO_CMD_HDR_INFO0_STATUS_REQUIRED; in ath11k_hal_reo_cmd_queue_stats()67 desc->cmd.info0 &= ~HAL_REO_CMD_HDR_INFO0_STATUS_REQUIRED; in ath11k_hal_reo_cmd_flush_cache()69 desc->cmd.info0 |= HAL_REO_CMD_HDR_INFO0_STATUS_REQUIRED; in ath11k_hal_reo_cmd_flush_cache()105 desc->cmd.info0 &= ~HAL_REO_CMD_HDR_INFO0_STATUS_REQUIRED; in ath11k_hal_reo_cmd_update_rx_queue()107 desc->cmd.info0 |= HAL_REO_CMD_HDR_INFO0_STATUS_REQUIRED; in ath11k_hal_reo_cmd_update_rx_queue()
883 #define HAL_REO_CMD_HDR_INFO0_STATUS_REQUIRED BIT(16) macro