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Searched refs:GENENB__BLK_IO_BASE_MASK (Results 1 – 15 of 15) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_sh_mask.h7071 #define GENENB__BLK_IO_BASE_MASK 0x000000ffL macro
Ddce_8_0_sh_mask.h10631 #define GENENB__BLK_IO_BASE_MASK 0xff macro
Ddce_10_0_sh_mask.h11015 #define GENENB__BLK_IO_BASE_MASK 0xff macro
Ddce_11_0_sh_mask.h10827 #define GENENB__BLK_IO_BASE_MASK 0xff macro
Ddce_11_2_sh_mask.h12081 #define GENENB__BLK_IO_BASE_MASK 0xff macro
Ddce_12_0_sh_mask.h2222 #define GENENB__BLK_IO_BASE_MASK … macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_sh_mask.h259 #define GENENB__BLK_IO_BASE_MASK … macro
Ddcn_3_2_1_sh_mask.h4457 #define GENENB__BLK_IO_BASE_MASK … macro
Ddcn_1_0_sh_mask.h861 #define GENENB__BLK_IO_BASE_MASK … macro
Ddcn_3_1_5_sh_mask.h5172 #define GENENB__BLK_IO_BASE_MASK … macro
Ddcn_3_0_2_sh_mask.h272 #define GENENB__BLK_IO_BASE_MASK … macro
Ddcn_3_1_6_sh_mask.h369 #define GENENB__BLK_IO_BASE_MASK … macro
Ddcn_2_0_0_sh_mask.h272 #define GENENB__BLK_IO_BASE_MASK … macro
Ddcn_3_0_0_sh_mask.h253 #define GENENB__BLK_IO_BASE_MASK … macro
Ddcn_3_2_0_sh_mask.h4456 #define GENENB__BLK_IO_BASE_MASK … macro