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Searched refs:GC_BASE__INST4_SEG0 (Results 1 – 14 of 14) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/
Dcyan_skillfish_ip_offset.h339 #define GC_BASE__INST4_SEG0 0 macro
Dnavi10_ip_offset.h379 #define GC_BASE__INST4_SEG0 0 macro
Dvega20_ip_offset.h404 #define GC_BASE__INST4_SEG0 0 macro
Dnavi14_ip_offset.h511 #define GC_BASE__INST4_SEG0 0 macro
Dnavi12_ip_offset.h511 #define GC_BASE__INST4_SEG0 0 macro
Ddimgrey_cavefish_ip_offset.h536 #define GC_BASE__INST4_SEG0 0 macro
Dsienna_cichlid_ip_offset.h518 #define GC_BASE__INST4_SEG0 0 macro
Dbeige_goby_ip_offset.h614 #define GC_BASE__INST4_SEG0 0 macro
Drenoir_ip_offset.h635 #define GC_BASE__INST4_SEG0 0 macro
Dvega10_ip_offset.h867 #define GC_BASE__INST4_SEG0 0 macro
Dvangogh_ip_offset.h702 #define GC_BASE__INST4_SEG0 0 macro
Dyellow_carp_offset.h658 #define GC_BASE__INST4_SEG0 0 macro
Darct_ip_offset.h496 #define GC_BASE__INST4_SEG0 0 macro
Daldebaran_ip_offset.h541 #define GC_BASE__INST4_SEG0 0 macro