Searched refs:GCC_UFS_PHY_BCR (Results 1 – 25 of 53) sorted by relevance
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| /linux-6.12.1/include/dt-bindings/clock/ |
| D | qcom,gcc-sc7180.h | 146 #define GCC_UFS_PHY_BCR 2 macro
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| D | qcom,gcc-sm6350.h | 163 #define GCC_UFS_PHY_BCR 4 macro
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| D | qcom,sm7150-gcc.h | 165 #define GCC_UFS_PHY_BCR 3 macro
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| D | qcom,sm4450-gcc.h | 182 #define GCC_UFS_PHY_BCR 18 macro
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| D | qcom,gcc-sm6115.h | 180 #define GCC_UFS_PHY_BCR 3 macro
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| D | qcom,gcc-sc7280.h | 218 #define GCC_UFS_PHY_BCR 9 macro
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| D | qcom,gcc-sm8450.h | 224 #define GCC_UFS_PHY_BCR 25 macro
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| D | qcom,sm8550-gcc.h | 208 #define GCC_UFS_PHY_BCR 24 macro
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| D | qcom,gcc-sm6125.h | 233 #define GCC_UFS_PHY_BCR 2 macro
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| D | qcom,sm6375-gcc.h | 214 #define GCC_UFS_PHY_BCR 13 macro
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| D | qcom,gcc-sm8150.h | 238 #define GCC_UFS_PHY_BCR 25 macro
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| D | qcom,gcc-sdm845.h | 219 #define GCC_UFS_PHY_BCR 14 macro
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| D | qcom,sm8650-gcc.h | 232 #define GCC_UFS_PHY_BCR 25 macro
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| D | qcom,gcc-sm8350.h | 239 #define GCC_UFS_PHY_BCR 25 macro
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| D | qcom,gcc-sm8250.h | 245 #define GCC_UFS_PHY_BCR 33 macro
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| D | qcom,gcc-sc8180x.h | 289 #define GCC_UFS_PHY_BCR 36 macro
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| D | qcom,sa8775p-gcc.h | 287 #define GCC_UFS_PHY_BCR 25 macro
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| D | qcom,gcc-sc8280xp.h | 451 #define GCC_UFS_PHY_BCR 49 macro
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| D | qcom,x1e80100-gcc.h | 457 #define GCC_UFS_PHY_BCR 60 macro
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| /linux-6.12.1/drivers/clk/qcom/ |
| D | gcc-sc7180.c | 2377 [GCC_UFS_PHY_BCR] = { 0x77000 },
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| D | gcc-sm6350.c | 2499 [GCC_UFS_PHY_BCR] = { 0x3a000 },
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| D | gcc-sm4450.c | 2782 [GCC_UFS_PHY_BCR] = { 0x87000 },
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| D | gcc-sm7150.c | 2914 [GCC_UFS_PHY_BCR] = { 0x77000 },
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| D | gcc-sm8450.c | 3196 [GCC_UFS_PHY_BCR] = { 0x87000 },
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| /linux-6.12.1/arch/arm64/boot/dts/qcom/ |
| D | sm6125.dtsi | 797 resets = <&gcc GCC_UFS_PHY_BCR>;
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