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Searched refs:GCC_QUPV3_WRAP2_S5_CLK (Results 1 – 25 of 30) sorted by relevance

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/linux-6.12.1/include/dt-bindings/clock/
Dqcom,gcc-sm8450.h142 #define GCC_QUPV3_WRAP2_S5_CLK 130 macro
Dqcom,sm8550-gcc.h132 #define GCC_QUPV3_WRAP2_S5_CLK 121 macro
Dqcom,gcc-sm8150.h129 #define GCC_QUPV3_WRAP2_S5_CLK 119 macro
Dqcom,sm8650-gcc.h139 #define GCC_QUPV3_WRAP2_S5_CLK 128 macro
Dqcom,gcc-sm8350.h131 #define GCC_QUPV3_WRAP2_S5_CLK 119 macro
Dqcom,gcc-sm8250.h139 #define GCC_QUPV3_WRAP2_S5_CLK 129 macro
Dqcom,gcc-sc8180x.h144 #define GCC_QUPV3_WRAP2_S5_CLK 134 macro
Dqcom,sa8775p-gcc.h164 #define GCC_QUPV3_WRAP2_S5_CLK 153 macro
Dqcom,gcc-sc8280xp.h243 #define GCC_QUPV3_WRAP2_S5_CLK 232 macro
Dqcom,x1e80100-gcc.h228 #define GCC_QUPV3_WRAP2_S5_CLK 218 macro
/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dsc8180x.dtsi1617 clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
1632 clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
1646 clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
Dsm8450.dtsi1007 clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
1027 clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
1044 clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
Dsc8280xp.dtsi1078 clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
1095 clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
1380 clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
Dsm8350.dtsi905 clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
921 clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
Dx1e80100.dtsi1152 clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
1185 clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
1218 clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
Dsm8150.dtsi1733 clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
1750 clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
Dsa8775p.dtsi1097 clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
1118 clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
Dsm8550.dtsi1046 clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
1066 clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
Dsm8650.dtsi1175 clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
1208 clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
/linux-6.12.1/drivers/clk/qcom/
Dgcc-sm8450.c3117 [GCC_QUPV3_WRAP2_S5_CLK] = &gcc_qupv3_wrap2_s5_clk.clkr,
Dgcc-sm8550.c3195 [GCC_QUPV3_WRAP2_S5_CLK] = &gcc_qupv3_wrap2_s5_clk.clkr,
Dgcc-sm8250.c3438 [GCC_QUPV3_WRAP2_S5_CLK] = &gcc_qupv3_wrap2_s5_clk.clkr,
Dgcc-sm8650.c3637 [GCC_QUPV3_WRAP2_S5_CLK] = &gcc_qupv3_wrap2_s5_clk.clkr,
Dgcc-sm8150.c3598 [GCC_QUPV3_WRAP2_S5_CLK] = &gcc_qupv3_wrap2_s5_clk.clkr,
Dgcc-sm8350.c3612 [GCC_QUPV3_WRAP2_S5_CLK] = &gcc_qupv3_wrap2_s5_clk.clkr,

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