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Searched refs:GCC_MMSS_GPLL0_DIV_CLK (Results 1 – 9 of 9) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Dqcom,gcc-sdm660.h71 #define GCC_MMSS_GPLL0_DIV_CLK 61 macro
Dqcom,gcc-msm8998.h193 #define GCC_MMSS_GPLL0_DIV_CLK 184 macro
Dqcom,gcc-msm8996.h237 #define GCC_MMSS_GPLL0_DIV_CLK 228 macro
/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dsdm660.dtsi241 <&gcc GCC_MMSS_GPLL0_DIV_CLK>,
Dsdm630.dtsi1539 <&gcc GCC_MMSS_GPLL0_DIV_CLK>,
Dmsm8998.dtsi2772 <&gcc GCC_MMSS_GPLL0_DIV_CLK>;
/linux-6.12.1/drivers/clk/qcom/
Dgcc-sdm660.c2348 [GCC_MMSS_GPLL0_DIV_CLK] = &gcc_mmss_gpll0_div_clk.clkr,
Dgcc-msm8998.c3190 [GCC_MMSS_GPLL0_DIV_CLK] = &gcc_mmss_gpll0_div_clk.clkr,
Dgcc-msm8996.c3458 [GCC_MMSS_GPLL0_DIV_CLK] = &gcc_mmss_gpll0_div_clk.clkr,