Searched refs:GCC_GPU_GPLL0_DIV_CLK_SRC (Results 1 – 25 of 52) sorted by relevance
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/linux-6.12.1/include/dt-bindings/clock/ |
D | qcom,gcc-sc7180.h | 47 #define GCC_GPU_GPLL0_DIV_CLK_SRC 37 macro
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D | qcom,sm7150-gcc.h | 45 #define GCC_GPU_GPLL0_DIV_CLK_SRC 33 macro
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D | qcom,gcc-qcm2290.h | 95 #define GCC_GPU_GPLL0_DIV_CLK_SRC 85 macro
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D | qcom,sm4450-gcc.h | 44 #define GCC_GPU_GPLL0_DIV_CLK_SRC 34 macro
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D | qcom,gcc-sm6115.h | 82 #define GCC_GPU_GPLL0_DIV_CLK_SRC 74 macro
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D | qcom,gcc-sc7280.h | 45 #define GCC_GPU_GPLL0_DIV_CLK_SRC 35 macro
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D | qcom,gcc-sm8450.h | 56 #define GCC_GPU_GPLL0_DIV_CLK_SRC 44 macro
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D | qcom,sm8550-gcc.h | 42 #define GCC_GPU_GPLL0_DIV_CLK_SRC 31 macro
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D | qcom,gcc-sm6125.h | 124 #define GCC_GPU_GPLL0_DIV_CLK_SRC 115 macro
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D | qcom,sm6375-gcc.h | 109 #define GCC_GPU_GPLL0_DIV_CLK_SRC 98 macro
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D | qcom,gcc-sm8150.h | 48 #define GCC_GPU_GPLL0_DIV_CLK_SRC 38 macro
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D | qcom,gcc-sdm845.h | 42 #define GCC_GPU_GPLL0_DIV_CLK_SRC 32 macro
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D | qcom,sm8650-gcc.h | 44 #define GCC_GPU_GPLL0_DIV_CLK_SRC 33 macro
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D | qcom,gcc-sm8350.h | 52 #define GCC_GPU_GPLL0_DIV_CLK_SRC 40 macro
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D | qcom,gcc-sm8250.h | 45 #define GCC_GPU_GPLL0_DIV_CLK_SRC 35 macro
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D | qcom,gcc-sc8180x.h | 47 #define GCC_GPU_GPLL0_DIV_CLK_SRC 37 macro
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D | qcom,sa8775p-gcc.h | 72 #define GCC_GPU_GPLL0_DIV_CLK_SRC 61 macro
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D | qcom,gcc-sc8280xp.h | 86 #define GCC_GPU_GPLL0_DIV_CLK_SRC 75 macro
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/linux-6.12.1/arch/arm64/boot/dts/qcom/ |
D | sm4450.dtsi | 433 <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
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/linux-6.12.1/drivers/clk/qcom/ |
D | gcc-sdm845.c | 3557 [GCC_GPU_GPLL0_DIV_CLK_SRC] = &gcc_gpu_gpll0_div_clk_src.clkr, 3710 [GCC_GPU_GPLL0_DIV_CLK_SRC] = &gcc_gpu_gpll0_div_clk_src.clkr,
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D | gcc-sc7180.c | 2271 [GCC_GPU_GPLL0_DIV_CLK_SRC] = &gcc_gpu_gpll0_div_clk_src.clkr,
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D | gcc-sm4450.c | 2642 [GCC_GPU_GPLL0_DIV_CLK_SRC] = &gcc_gpu_gpll0_div_clk_src.clkr,
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D | gcc-sm7150.c | 2785 [GCC_GPU_GPLL0_DIV_CLK_SRC] = &gcc_gpu_gpll0_div_clk_src.clkr,
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D | gcc-sm8450.c | 3031 [GCC_GPU_GPLL0_DIV_CLK_SRC] = &gcc_gpu_gpll0_div_clk_src.clkr,
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D | gcc-sm8550.c | 3105 [GCC_GPU_GPLL0_DIV_CLK_SRC] = &gcc_gpu_gpll0_div_clk_src.clkr,
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