Searched refs:EXYNOS5_TIMING_SET_SWI (Results 1 – 1 of 1) sorted by relevance
40 #define EXYNOS5_TIMING_SET_SWI BIT(28) macro324 reg |= EXYNOS5_TIMING_SET_SWI; in exynos5_switch_timing_regs()326 reg &= ~EXYNOS5_TIMING_SET_SWI; in exynos5_switch_timing_regs()