Searched refs:EMC_MRR_DIVLD_INT (Results 1 – 2 of 2) sorted by relevance
103 #define EMC_MRR_DIVLD_INT BIT(5) macro545 writel_relaxed(EMC_MRR_DIVLD_INT, emc->regs + EMC_INTSTATUS); in emc_read_lpddr_mode_register()555 val & EMC_MRR_DIVLD_INT, in emc_read_lpddr_mode_register()
217 #define EMC_MRR_DIVLD_INT BIT(5) macro1066 writel_relaxed(EMC_MRR_DIVLD_INT, emc->regs + EMC_INTSTATUS); in emc_read_lpddr_mode_register()1076 val & EMC_MRR_DIVLD_INT, in emc_read_lpddr_mode_register()