Searched refs:D_BDW (Results 1 – 2 of 2) sorted by relevance
| /linux-6.12.1/drivers/gpu/drm/i915/gvt/ |
| D | mmio.h | 44 #define D_BDW (1 << 0) macro
51 #define D_GEN8PLUS (D_BDW | D_SKL | D_KBL | D_BXT | D_CFL)
54 #define D_BDW_PLUS (D_BDW | D_SKL | D_KBL | D_BXT | D_CFL)
56 #define D_PRE_SKL (D_BDW)
57 #define D_ALL (D_BDW | D_SKL | D_KBL | D_BXT | D_CFL)
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| D | handlers.c | 74 return D_BDW; in intel_gvt_get_device_type()
2377 MMIO_DH(FORCEWAKE_ACK_HSW, D_BDW, NULL, NULL); in init_generic_mmio_info()
2380 MMIO_DH(HSW_PWR_WELL_CTL1, D_BDW, NULL, power_well_ctl_mmio_write); in init_generic_mmio_info()
2381 MMIO_DH(HSW_PWR_WELL_CTL2, D_BDW, NULL, power_well_ctl_mmio_write); in init_generic_mmio_info()
2382 MMIO_DH(HSW_PWR_WELL_CTL3, D_BDW, NULL, power_well_ctl_mmio_write); in init_generic_mmio_info()
2383 MMIO_DH(HSW_PWR_WELL_CTL4, D_BDW, NULL, power_well_ctl_mmio_write); in init_generic_mmio_info()
2384 MMIO_DH(HSW_PWR_WELL_CTL5, D_BDW, NULL, power_well_ctl_mmio_write); in init_generic_mmio_info()
2385 MMIO_DH(HSW_PWR_WELL_CTL6, D_BDW, NULL, power_well_ctl_mmio_write); in init_generic_mmio_info()
2552 MMIO_DFH(_MMIO(0xb1f0), D_BDW, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2553 MMIO_DFH(_MMIO(0xb1c0), D_BDW, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
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