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Searched refs:DSCC_PPS_CONFIG5 (Results 1 – 6 of 6) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dsc/dcn20/
Ddcn20_dsc.h46 SRI(DSCC_PPS_CONFIG5, DSCC, id),\
473 uint32_t DSCC_PPS_CONFIG5; member
Ddcn20_dsc.c660 REG_SET_2(DSCC_PPS_CONFIG5, 0, in dsc_write_to_registers()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dsc/dcn401/
Ddcn401_dsc.c300 REG_SET_2(DSCC_PPS_CONFIG5, 0, in dsc_write_to_registers()
Ddcn401_dsc.h217 uint32_t DSCC_PPS_CONFIG5; member
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn401/
Ddcn401_resource.h430 SRI_ARR(DSCC_PPS_CONFIG5, DSCC, id), \
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn32/
Ddcn32_resource.h731 SRI_ARR(DSCC_PPS_CONFIG5, DSCC, id), \