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Searched refs:DSCC_PPS_CONFIG20 (Results 1 – 6 of 6) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dsc/dcn20/
Ddcn20_dsc.h61 SRI(DSCC_PPS_CONFIG20, DSCC, id),\
488 uint32_t DSCC_PPS_CONFIG20; member
Ddcn20_dsc.c750 REG_SET_6(DSCC_PPS_CONFIG20, 0, in dsc_write_to_registers()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dsc/dcn401/
Ddcn401_dsc.c390 REG_SET_6(DSCC_PPS_CONFIG20, 0, in dsc_write_to_registers()
Ddcn401_dsc.h232 uint32_t DSCC_PPS_CONFIG20; member
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn401/
Ddcn401_resource.h445 SRI_ARR(DSCC_PPS_CONFIG20, DSCC, id), \
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn32/
Ddcn32_resource.h746 SRI_ARR(DSCC_PPS_CONFIG20, DSCC, id), \