Searched refs:DSCC_PPS_CONFIG1 (Results 1 – 6 of 6) sorted by relevance
| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dsc/dcn401/ |
| D | dcn401_dsc.c | 126 REG_GET(DSCC_PPS_CONFIG1, BITS_PER_PIXEL, &s->dsc_bits_per_pixel); in dsc401_read_state()
128 REG_GET(DSCC_PPS_CONFIG1, CHUNK_SIZE, &s->dsc_chunk_size); in dsc401_read_state()
280 REG_SET_7(DSCC_PPS_CONFIG1, 0, in dsc_write_to_registers()
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| D | dcn401_dsc.h | 213 uint32_t DSCC_PPS_CONFIG1; member
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dsc/dcn20/ |
| D | dcn20_dsc.c | 155 REG_GET(DSCC_PPS_CONFIG1, BITS_PER_PIXEL, &s->dsc_bits_per_pixel); in dsc2_read_state()
157 REG_GET(DSCC_PPS_CONFIG1, CHUNK_SIZE, &s->dsc_chunk_size); in dsc2_read_state()
640 REG_SET_7(DSCC_PPS_CONFIG1, 0, in dsc_write_to_registers()
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| D | dcn20_dsc.h | 42 SRI(DSCC_PPS_CONFIG1, DSCC, id),\
469 uint32_t DSCC_PPS_CONFIG1; member
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn401/ |
| D | dcn401_resource.h | 426 SRI_ARR(DSCC_PPS_CONFIG1, DSCC, id), \
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| D | dcn32_resource.h | 727 SRI_ARR(DSCC_PPS_CONFIG1, DSCC, id), \
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