Searched refs:DSCCLK_DTO_CTRL (Results 1 – 9 of 9) sorted by relevance
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn31/ |
D | dcn31_dccg.c | 363 REG_UPDATE(DSCCLK_DTO_CTRL, in dccg31_disable_dscclk() 370 REG_UPDATE(DSCCLK_DTO_CTRL, in dccg31_disable_dscclk() 377 REG_UPDATE(DSCCLK_DTO_CTRL, in dccg31_disable_dscclk() 385 REG_UPDATE(DSCCLK_DTO_CTRL, in dccg31_disable_dscclk() 410 REG_UPDATE(DSCCLK_DTO_CTRL, in dccg31_enable_dscclk() 417 REG_UPDATE(DSCCLK_DTO_CTRL, in dccg31_enable_dscclk() 424 REG_UPDATE(DSCCLK_DTO_CTRL, in dccg31_enable_dscclk() 429 REG_UPDATE(DSCCLK_DTO_CTRL, in dccg31_enable_dscclk()
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D | dcn31_dccg.h | 66 SR(DSCCLK_DTO_CTRL),\ 142 DCCG_SF(DSCCLK_DTO_CTRL, DSCCLK0_DTO_ENABLE, mask_sh),\ 143 DCCG_SF(DSCCLK_DTO_CTRL, DSCCLK1_DTO_ENABLE, mask_sh),\ 144 DCCG_SF(DSCCLK_DTO_CTRL, DSCCLK2_DTO_ENABLE, mask_sh),\
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn314/ |
D | dcn314_dccg.h | 72 SR(DSCCLK_DTO_CTRL),\ 187 DCCG_SF(DSCCLK_DTO_CTRL, DSCCLK0_DTO_ENABLE, mask_sh),\ 188 DCCG_SF(DSCCLK_DTO_CTRL, DSCCLK1_DTO_ENABLE, mask_sh),\ 189 DCCG_SF(DSCCLK_DTO_CTRL, DSCCLK2_DTO_ENABLE, mask_sh),\ 190 DCCG_SF(DSCCLK_DTO_CTRL, DSCCLK3_DTO_ENABLE, mask_sh),\
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn401/ |
D | dcn401_dccg.c | 742 REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK0_EN, 1); in dccg401_set_dto_dscclk() 749 REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK1_EN, 1); in dccg401_set_dto_dscclk() 755 REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK2_EN, 1); in dccg401_set_dto_dscclk() 761 REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK3_EN, 1); in dccg401_set_dto_dscclk() 776 REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK0_EN, 0); in dccg401_set_ref_dscclk() 782 REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK1_EN, 0); in dccg401_set_ref_dscclk() 788 REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK2_EN, 0); in dccg401_set_ref_dscclk() 794 REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK3_EN, 0); in dccg401_set_ref_dscclk()
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D | dcn401_dccg.h | 116 DCCG_SF(DSCCLK_DTO_CTRL, DSCCLK0_EN, mask_sh),\ 117 DCCG_SF(DSCCLK_DTO_CTRL, DSCCLK1_EN, mask_sh),\ 118 DCCG_SF(DSCCLK_DTO_CTRL, DSCCLK2_EN, mask_sh),\ 119 DCCG_SF(DSCCLK_DTO_CTRL, DSCCLK3_EN, mask_sh),\
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn35/ |
D | dcn35_dccg.h | 78 DCCG_SF(DSCCLK_DTO_CTRL, DSCCLK0_EN, mask_sh),\ 79 DCCG_SF(DSCCLK_DTO_CTRL, DSCCLK1_EN, mask_sh),\ 80 DCCG_SF(DSCCLK_DTO_CTRL, DSCCLK2_EN, mask_sh),\ 81 DCCG_SF(DSCCLK_DTO_CTRL, DSCCLK3_EN, mask_sh),\
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D | dcn35_dccg.c | 498 REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK0_EN, src); in dccg35_set_dsc_clk_src_new() 501 REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK1_EN, src); in dccg35_set_dsc_clk_src_new() 504 REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK2_EN, src); in dccg35_set_dsc_clk_src_new() 507 REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK3_EN, src); in dccg35_set_dsc_clk_src_new() 1774 REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK0_EN, 1); in dccg35_enable_dscclk() 1782 REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK1_EN, 1); in dccg35_enable_dscclk() 1790 REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK2_EN, 1); in dccg35_enable_dscclk() 1798 REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK3_EN, 1); in dccg35_enable_dscclk() 1818 REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK0_EN, 0); in dccg35_disable_dscclk() 1826 REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK1_EN, 0); in dccg35_disable_dscclk() [all …]
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn20/ |
D | dcn20_dccg.h | 404 uint32_t DSCCLK_DTO_CTRL; member
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn401/ |
D | dcn401_resource.h | 637 SR(DSCCLK_DTO_CTRL),\
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