Searched refs:DSCCLK3_DTO_PARAM (Results 1 – 8 of 8) sorted by relevance
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn314/ |
D | dcn314_dccg.h | 71 SR(DSCCLK3_DTO_PARAM),\ 153 DCCG_SF(DSCCLK3_DTO_PARAM, DSCCLK3_DTO_PHASE, mask_sh),\ 154 DCCG_SF(DSCCLK3_DTO_PARAM, DSCCLK3_DTO_MODULO, mask_sh),\
|
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn31/ |
D | dcn31_dccg.c | 384 if (REG(DSCCLK3_DTO_PARAM)) { in dccg31_disable_dscclk() 387 REG_UPDATE_2(DSCCLK3_DTO_PARAM, in dccg31_disable_dscclk() 428 if (REG(DSCCLK3_DTO_PARAM)) { in dccg31_enable_dscclk() 431 REG_UPDATE_2(DSCCLK3_DTO_PARAM, in dccg31_enable_dscclk()
|
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn401/ |
D | dcn401_dccg.h | 126 DCCG_SF(DSCCLK3_DTO_PARAM, DSCCLK3_DTO_PHASE, mask_sh),\ 127 DCCG_SF(DSCCLK3_DTO_PARAM, DSCCLK3_DTO_MODULO, mask_sh),\
|
D | dcn401_dccg.c | 758 REG_UPDATE_2(DSCCLK3_DTO_PARAM, in dccg401_set_dto_dscclk() 795 REG_UPDATE_2(DSCCLK3_DTO_PARAM, in dccg401_set_ref_dscclk()
|
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn35/ |
D | dcn35_dccg.h | 88 DCCG_SF(DSCCLK3_DTO_PARAM, DSCCLK3_DTO_PHASE, mask_sh),\ 89 DCCG_SF(DSCCLK3_DTO_PARAM, DSCCLK3_DTO_MODULO, mask_sh),\
|
D | dcn35_dccg.c | 1795 REG_UPDATE_2(DSCCLK3_DTO_PARAM, in dccg35_enable_dscclk() 1843 REG_UPDATE_2(DSCCLK3_DTO_PARAM, in dccg35_disable_dscclk()
|
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn20/ |
D | dcn20_dccg.h | 408 uint32_t DSCCLK3_DTO_PARAM; member
|
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn401/ |
D | dcn401_resource.h | 636 SR(DSCCLK3_DTO_PARAM),\
|