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Searched refs:DSCCLK1_DTO_PARAM (Results 1 – 9 of 9) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn31/
Ddcn31_dccg.h64 SR(DSCCLK1_DTO_PARAM),\
138 DCCG_SF(DSCCLK1_DTO_PARAM, DSCCLK1_DTO_PHASE, mask_sh),\
139 DCCG_SF(DSCCLK1_DTO_PARAM, DSCCLK1_DTO_MODULO, mask_sh),\
Ddcn31_dccg.c372 REG_UPDATE_2(DSCCLK1_DTO_PARAM, in dccg31_disable_dscclk()
414 REG_UPDATE_2(DSCCLK1_DTO_PARAM, in dccg31_enable_dscclk()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn314/
Ddcn314_dccg.h69 SR(DSCCLK1_DTO_PARAM),\
149 DCCG_SF(DSCCLK1_DTO_PARAM, DSCCLK1_DTO_PHASE, mask_sh),\
150 DCCG_SF(DSCCLK1_DTO_PARAM, DSCCLK1_DTO_MODULO, mask_sh),\
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn401/
Ddcn401_dccg.h122 DCCG_SF(DSCCLK1_DTO_PARAM, DSCCLK1_DTO_PHASE, mask_sh),\
123 DCCG_SF(DSCCLK1_DTO_PARAM, DSCCLK1_DTO_MODULO, mask_sh),\
Ddcn401_dccg.c746 REG_UPDATE_2(DSCCLK1_DTO_PARAM, in dccg401_set_dto_dscclk()
783 REG_UPDATE_2(DSCCLK1_DTO_PARAM, in dccg401_set_ref_dscclk()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn35/
Ddcn35_dccg.h84 DCCG_SF(DSCCLK1_DTO_PARAM, DSCCLK1_DTO_PHASE, mask_sh),\
85 DCCG_SF(DSCCLK1_DTO_PARAM, DSCCLK1_DTO_MODULO, mask_sh),\
Ddcn35_dccg.c1779 REG_UPDATE_2(DSCCLK1_DTO_PARAM, in dccg35_enable_dscclk()
1827 REG_UPDATE_2(DSCCLK1_DTO_PARAM, in dccg35_disable_dscclk()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn20/
Ddcn20_dccg.h406 uint32_t DSCCLK1_DTO_PARAM; member
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn401/
Ddcn401_resource.h634 SR(DSCCLK1_DTO_PARAM),\