Searched refs:DSCCLK1_DTO_PARAM (Results 1 – 9 of 9) sorted by relevance
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn31/ |
D | dcn31_dccg.h | 64 SR(DSCCLK1_DTO_PARAM),\ 138 DCCG_SF(DSCCLK1_DTO_PARAM, DSCCLK1_DTO_PHASE, mask_sh),\ 139 DCCG_SF(DSCCLK1_DTO_PARAM, DSCCLK1_DTO_MODULO, mask_sh),\
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D | dcn31_dccg.c | 372 REG_UPDATE_2(DSCCLK1_DTO_PARAM, in dccg31_disable_dscclk() 414 REG_UPDATE_2(DSCCLK1_DTO_PARAM, in dccg31_enable_dscclk()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn314/ |
D | dcn314_dccg.h | 69 SR(DSCCLK1_DTO_PARAM),\ 149 DCCG_SF(DSCCLK1_DTO_PARAM, DSCCLK1_DTO_PHASE, mask_sh),\ 150 DCCG_SF(DSCCLK1_DTO_PARAM, DSCCLK1_DTO_MODULO, mask_sh),\
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn401/ |
D | dcn401_dccg.h | 122 DCCG_SF(DSCCLK1_DTO_PARAM, DSCCLK1_DTO_PHASE, mask_sh),\ 123 DCCG_SF(DSCCLK1_DTO_PARAM, DSCCLK1_DTO_MODULO, mask_sh),\
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D | dcn401_dccg.c | 746 REG_UPDATE_2(DSCCLK1_DTO_PARAM, in dccg401_set_dto_dscclk() 783 REG_UPDATE_2(DSCCLK1_DTO_PARAM, in dccg401_set_ref_dscclk()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn35/ |
D | dcn35_dccg.h | 84 DCCG_SF(DSCCLK1_DTO_PARAM, DSCCLK1_DTO_PHASE, mask_sh),\ 85 DCCG_SF(DSCCLK1_DTO_PARAM, DSCCLK1_DTO_MODULO, mask_sh),\
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D | dcn35_dccg.c | 1779 REG_UPDATE_2(DSCCLK1_DTO_PARAM, in dccg35_enable_dscclk() 1827 REG_UPDATE_2(DSCCLK1_DTO_PARAM, in dccg35_disable_dscclk()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn20/ |
D | dcn20_dccg.h | 406 uint32_t DSCCLK1_DTO_PARAM; member
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn401/ |
D | dcn401_resource.h | 634 SR(DSCCLK1_DTO_PARAM),\
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