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Searched refs:DSCCLK0_DTO_PARAM (Results 1 – 9 of 9) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn31/
Ddcn31_dccg.h63 SR(DSCCLK0_DTO_PARAM),\
136 DCCG_SF(DSCCLK0_DTO_PARAM, DSCCLK0_DTO_PHASE, mask_sh),\
137 DCCG_SF(DSCCLK0_DTO_PARAM, DSCCLK0_DTO_MODULO, mask_sh),\
Ddcn31_dccg.c365 REG_UPDATE_2(DSCCLK0_DTO_PARAM, in dccg31_disable_dscclk()
407 REG_UPDATE_2(DSCCLK0_DTO_PARAM, in dccg31_enable_dscclk()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn314/
Ddcn314_dccg.h68 SR(DSCCLK0_DTO_PARAM),\
147 DCCG_SF(DSCCLK0_DTO_PARAM, DSCCLK0_DTO_PHASE, mask_sh),\
148 DCCG_SF(DSCCLK0_DTO_PARAM, DSCCLK0_DTO_MODULO, mask_sh),\
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn401/
Ddcn401_dccg.h120 DCCG_SF(DSCCLK0_DTO_PARAM, DSCCLK0_DTO_PHASE, mask_sh),\
121 DCCG_SF(DSCCLK0_DTO_PARAM, DSCCLK0_DTO_MODULO, mask_sh),\
Ddcn401_dccg.c739 REG_UPDATE_2(DSCCLK0_DTO_PARAM, in dccg401_set_dto_dscclk()
777 REG_UPDATE_2(DSCCLK0_DTO_PARAM, in dccg401_set_ref_dscclk()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn35/
Ddcn35_dccg.h82 DCCG_SF(DSCCLK0_DTO_PARAM, DSCCLK0_DTO_PHASE, mask_sh),\
83 DCCG_SF(DSCCLK0_DTO_PARAM, DSCCLK0_DTO_MODULO, mask_sh),\
Ddcn35_dccg.c1771 REG_UPDATE_2(DSCCLK0_DTO_PARAM, in dccg35_enable_dscclk()
1819 REG_UPDATE_2(DSCCLK0_DTO_PARAM, in dccg35_disable_dscclk()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn20/
Ddcn20_dccg.h405 uint32_t DSCCLK0_DTO_PARAM; member
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn401/
Ddcn401_resource.h633 SR(DSCCLK0_DTO_PARAM),\