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Searched refs:DRAMClockChangeSupport (Results 1 – 24 of 24) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/ !
Ddml2_wrapper.c133 if (p->cur_mode_support_info->DRAMClockChangeSupport[0] == dml_dram_clock_change_unsupported) { in optimize_configuration()
273 if (dml_result && s->evaluation_info.DRAMClockChangeSupport[0] == dml_dram_clock_change_vactive) { in calculate_lowest_supported_state_for_temp_read()
453 …} else if (s->mode_support_info.DRAMClockChangeSupport[0] != dml_dram_clock_change_unsupported && … in optimize_pstate_with_svp_and_drr()
484 if (s->mode_support_info.DRAMClockChangeSupport[0] != dml_dram_clock_change_unsupported) { in optimize_pstate_with_svp_and_drr()
485 …idate_static_schedulability(dml2, display_state, s->mode_support_info.DRAMClockChangeSupport[0])) { in optimize_pstate_with_svp_and_drr()
504 …if (result && s->mode_support_info.DRAMClockChangeSupport[0] != dml_dram_clock_change_unsupported)… in optimize_pstate_with_svp_and_drr()
630 …out_clks.p_state_supported = s->mode_support_info.DRAMClockChangeSupport[0] != dml_dram_clock_chan… in dml2_validate_and_build_resource()
806 …*dram_clk_change_support = (unsigned int) dml2->v20.dml_core_ctx.ms.support.DRAMClockChangeSupport… in dml2_extract_dram_and_fclk_change_support()
Ddisplay_mode_core.c3036 *p->DRAMClockChangeSupport = dml_dram_clock_change_vactive; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
3038 *p->DRAMClockChangeSupport = dml_dram_clock_change_vblank; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
3040 *p->DRAMClockChangeSupport = dml_dram_clock_change_vblank_drr; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
3042 *p->DRAMClockChangeSupport = dml_dram_clock_change_unsupported; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
3046 *p->DRAMClockChangeSupport = dml_dram_clock_change_vactive_w_mall_full_frame; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
3048 *p->DRAMClockChangeSupport = dml_dram_clock_change_vblank_w_mall_full_frame; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
3050 *p->DRAMClockChangeSupport = dml_dram_clock_change_vblank_drr_w_mall_full_frame; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
3052 *p->DRAMClockChangeSupport = dml_dram_clock_change_unsupported; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
3056 *p->DRAMClockChangeSupport = dml_dram_clock_change_vactive_w_mall_sub_vp; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
3058 *p->DRAMClockChangeSupport = dml_dram_clock_change_vblank_w_mall_sub_vp; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
[all …]
Ddisplay_mode_util.c492 if (!fail_only || support->DRAMClockChangeSupport[j] == dml_dram_clock_change_unsupported) in dml_print_dml_mode_support_info()
493 …("DML: support: combine=%d, DRAMClockChangeSupport = %d\n", j, support->DRAMClockChangeSupport[j]); in dml_print_dml_mode_support_info()
Ddisplay_mode_core_structs.h716 enum dml_dram_clock_change_support DRAMClockChangeSupport[2]; member
1196 enum dml_dram_clock_change_support DRAMClockChangeSupport; member
1324 enum dml_dram_clock_change_support *DRAMClockChangeSupport; member
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn32/ !
Ddcn32_fpu.c284 …enum clock_change_support temp_clock_change_support = vba->DRAMClockChangeSupport[vlevel][context-… in dcn32_find_dummy_latency_index_for_fw_based_mclk_switch()
290 …vba->DRAMClockChangeSupport[vlevel][context->bw_ctx.dml.vba.maxMpcComb] = temp_clock_change_suppor… in dcn32_find_dummy_latency_index_for_fw_based_mclk_switch()
296 if (vba->DRAMClockChangeSupport[vlevel][vba->maxMpcComb] == dm_dram_clock_change_unsupported && in dcn32_find_dummy_latency_index_for_fw_based_mclk_switch()
298 …vba->DRAMClockChangeSupport[vlevel][context->bw_ctx.dml.vba.maxMpcComb] = temp_clock_change_suppor… in dcn32_find_dummy_latency_index_for_fw_based_mclk_switch()
301 vba->DRAMClockChangeSupport[vlevel][vba->maxMpcComb] != dm_dram_clock_change_unsupported) in dcn32_find_dummy_latency_index_for_fw_based_mclk_switch()
1081 …} else if (vba->DRAMClockChangeSupport[vlevel][vba->maxMpcComb] == dm_dram_clock_change_vactive_w_… in subvp_validate_static_schedulability()
1488 vba->DRAMClockChangeSupport[*vlevel][vba->maxMpcComb] != dm_dram_clock_change_unsupported) || in dcn32_full_validate_bw_helper()
1489 vba->DRAMClockChangeSupport[*vlevel][vba->maxMpcComb] == dm_dram_clock_change_unsupported || in dcn32_full_validate_bw_helper()
1528 if (vba->DRAMClockChangeSupport[i][vba->maxMpcComb] != dm_dram_clock_change_unsupported) { in dcn32_full_validate_bw_helper()
1560 vba->DRAMClockChangeSupport[*vlevel][vba->maxMpcComb] = dm_dram_clock_change_unsupported; in dcn32_full_validate_bw_helper()
[all …]
Ddisplay_mode_vba_util_32.c4281 enum clock_change_support *DRAMClockChangeSupport, in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport() argument
4575 *DRAMClockChangeSupport = dm_dram_clock_change_vactive; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
4577 *DRAMClockChangeSupport = dm_dram_clock_change_vblank; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
4579 *DRAMClockChangeSupport = dm_dram_clock_change_unsupported; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
4582 *DRAMClockChangeSupport = dm_dram_clock_change_vactive_w_mall_full_frame; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
4584 *DRAMClockChangeSupport = dm_dram_clock_change_vblank_w_mall_full_frame; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
4586 *DRAMClockChangeSupport = dm_dram_clock_change_unsupported; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
4589 *DRAMClockChangeSupport = dm_dram_clock_change_vactive_w_mall_sub_vp; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
4591 *DRAMClockChangeSupport = dm_dram_clock_change_vblank_w_mall_sub_vp; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
4593 *DRAMClockChangeSupport = dm_dram_clock_change_unsupported; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
[all …]
Ddisplay_mode_vba_util_32.h827 enum clock_change_support *DRAMClockChangeSupport,
Ddisplay_mode_vba_32.c1711 || mode_lib->vba.DRAMClockChangeSupport[i][j] != dm_dram_clock_change_unsupported) in mode_support_configuration()
3608 &v->DRAMClockChangeSupport[i][j], in dml32_ModeSupportAndSystemConfigurationFull()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn30/ !
Ddcn30_fpu.c388 …bool pstate_en = context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][maxMpcComb] != dm_dram_clo… in dcn30_fpu_calculate_wm_and_dlg()
421 …pstate_en = context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][maxMpcComb] != dm_dram_clock_ch… in dcn30_fpu_calculate_wm_and_dlg()
490 if (context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][maxMpcComb] == in dcn30_fpu_calculate_wm_and_dlg()
Ddisplay_mode_vba_30.c345 enum clock_change_support *DRAMClockChangeSupport,
2740 enum clock_change_support DRAMClockChangeSupport = 0; // dummy in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() local
2792 &DRAMClockChangeSupport, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
5069 &v->DRAMClockChangeSupport[i][j], in dml30_ModeSupportAndSystemConfigurationFull()
5241 enum clock_change_support *DRAMClockChangeSupport, in CalculateWatermarksAndDRAMSpeedChangeSupport()
5387 *DRAMClockChangeSupport = dm_dram_clock_change_vactive; in CalculateWatermarksAndDRAMSpeedChangeSupport()
5389 *DRAMClockChangeSupport = dm_dram_clock_change_vblank; in CalculateWatermarksAndDRAMSpeedChangeSupport()
5391 *DRAMClockChangeSupport = dm_dram_clock_change_unsupported; in CalculateWatermarksAndDRAMSpeedChangeSupport()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/ !
Ddml2_core_shared_types.h255 enum dml2_dram_clock_change_support DRAMClockChangeSupport[DML2_MAX_PLANES]; member
801 enum dml2_dram_clock_change_support DRAMClockChangeSupport[DML2_MAX_PLANES]; member
1548 enum dml2_dram_clock_change_support *DRAMClockChangeSupport; member
Ddml2_core_shared.c2700 CalculateWatermarks_params->DRAMClockChangeSupport = mode_lib->ms.support.DRAMClockChangeSupport; in dml2_core_shared_mode_support()
8892 p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_unsupported; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
8895 p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_vblank_and_vactive; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
8897 p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_vactive; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
8899 p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_vblank; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
8901 p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_vactive; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
8903 p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_vblank; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
8905 p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_drr; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
8907 p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_mall_svp; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
8909 p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_mall_full_frame; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
[all …]
Ddml2_core_dcn4_calcs.c6594 p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_unsupported; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6598 p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_vblank_and_vactive; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6600 p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_vactive; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6602 p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_vblank; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6604 p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_vactive; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6606 p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_vblank; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6608 p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_drr; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6610 p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_mall_svp; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6612 p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_mall_full_frame; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6614 if (p->DRAMClockChangeSupport[k] == dml2_dram_clock_change_unsupported) in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
[all …]
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn31/ !
Ddcn31_fpu.c471 …if (context->bw_ctx.dml.vba.DRAMClockChangeSupport[context->bw_ctx.dml.vba.VoltageLevel][context->… in dcn315_update_soc_for_wm_a()
562 …context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][context->bw_ctx.dml.vba.maxMpcComb] == dm_d… in dcn31_calculate_wm_and_dlg_fp()
Ddisplay_mode_vba_31.c312 enum clock_change_support *DRAMClockChangeSupport,
2936 enum clock_change_support DRAMClockChangeSupport; // dummy local
2957 &DRAMClockChangeSupport,
5367 &v->DRAMClockChangeSupport[i][j],
5565 enum clock_change_support *DRAMClockChangeSupport, argument
5729 *DRAMClockChangeSupport = dm_dram_clock_change_vactive;
5732 *DRAMClockChangeSupport = dm_dram_clock_change_vblank;
5734 *DRAMClockChangeSupport = dm_dram_clock_change_unsupported;
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn21/ !
Ddisplay_mode_vba_21.c334 enum clock_change_support *DRAMClockChangeSupport,
2416 enum clock_change_support DRAMClockChangeSupport; // dummy in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() local
2466 &DRAMClockChangeSupport, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
5036 &locals->DRAMClockChangeSupport[i][j], in dml21_ModeSupportAndSystemConfigurationFull()
5203 && ((locals->DRAMClockChangeSupport[i][1] == dm_dram_clock_change_vactive in dml21_ModeSupportAndSystemConfigurationFull()
5204 && locals->DRAMClockChangeSupport[i][0] != dm_dram_clock_change_vactive) in dml21_ModeSupportAndSystemConfigurationFull()
5205 || (locals->DRAMClockChangeSupport[i][1] == dm_dram_clock_change_vblank in dml21_ModeSupportAndSystemConfigurationFull()
5206 && locals->DRAMClockChangeSupport[i][0] == dm_dram_clock_change_unsupported))))) { in dml21_ModeSupportAndSystemConfigurationFull()
5291 enum clock_change_support *DRAMClockChangeSupport, in CalculateWatermarksAndDRAMSpeedChangeSupport()
5498 *DRAMClockChangeSupport = dm_dram_clock_change_vactive; in CalculateWatermarksAndDRAMSpeedChangeSupport()
[all …]
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn32/ !
Ddcn32_resource_helpers.c744 vba->DRAMClockChangeSupport[vlevel][vba->maxMpcComb] == dm_dram_clock_change_vblank_w_mall_sub_vp) in dcn32_subvp_vblank_admissable()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn20/ !
Ddisplay_mode_vba_20v2.c2649 mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vactive; in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2652 mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vactive; in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2659 mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vblank; in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2662 mode_lib->vba.DRAMClockChangeSupport[0][0] = in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2667 mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_unsupported; in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2673 mode_lib->vba.DRAMClockChangeSupport[k][j] = mode_lib->vba.DRAMClockChangeSupport[0][0]; in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
Ddisplay_mode_vba_20.c2584 mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vactive; in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2587 mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vblank; in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2590 mode_lib->vba.DRAMClockChangeSupport[0][0] = in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2595 mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_unsupported; in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2600 mode_lib->vba.DRAMClockChangeSupport[k][j] = mode_lib->vba.DRAMClockChangeSupport[0][0]; in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
Ddcn20_fpu.c1165 context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][context->bw_ctx.dml.vba.maxMpcComb] in dcn20_calculate_dlg_params()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/core/ !
Ddc_hw_sequencer.c511 if (vba->DRAMClockChangeSupport[vba->VoltageLevel][vba->maxMpcComb] != in set_p_state_switch_method()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/ !
Ddisplay_mode_vba.h847 enum clock_change_support DRAMClockChangeSupport[DC__VOLTAGE_STATES][2]; member
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn314/ !
Ddisplay_mode_vba_314.c321 enum clock_change_support *DRAMClockChangeSupport,
2954 enum clock_change_support DRAMClockChangeSupport; // dummy local
2976 &DRAMClockChangeSupport,
5453 &v->DRAMClockChangeSupport[i][j],
5659 enum clock_change_support *DRAMClockChangeSupport, argument
5823 *DRAMClockChangeSupport = dm_dram_clock_change_vactive;
5826 *DRAMClockChangeSupport = dm_dram_clock_change_vblank;
5828 *DRAMClockChangeSupport = dm_dram_clock_change_unsupported;
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn30/ !
Ddcn30_resource.c1648 context->bw_ctx.dml.vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vactive; in dcn30_internal_validate_bw()
1674 vba->DRAMClockChangeSupport[vlevel][vba->maxMpcComb] == dm_dram_clock_change_unsupported)) { in dcn30_internal_validate_bw()