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Searched refs:DPU_DEBUG (Results 1 – 12 of 12) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_encoder_phys_wb.c116 DPU_DEBUG("[qos_remap] wb:%d vbif:%d xin:%d is_rt:%d\n", in dpu_encoder_phys_wb_set_qos_remap()
289 DPU_DEBUG("[wb:%d]\n", hw_wb->idx - WB_0); in _dpu_encoder_phys_wb_update_flush()
292 DPU_DEBUG("[wb:%d] no ctl assigned\n", hw_wb->idx - WB_0); in _dpu_encoder_phys_wb_update_flush()
310 DPU_DEBUG("Pending flush mask for CTL_%d is 0x%x, WB %d\n", in _dpu_encoder_phys_wb_update_flush()
334 DPU_DEBUG("[mode_set:%d, \"%s\",%d,%d]\n", in dpu_encoder_phys_wb_setup()
364 DPU_DEBUG("[wb:%d]\n", hw_wb->idx - WB_0); in dpu_encoder_phys_wb_done_irq()
479 DPU_DEBUG("[wb:%d]\n", phys_enc->hw_wb->idx - WB_0); in dpu_encoder_phys_wb_prepare_for_kickoff()
503 DPU_DEBUG("[wb:%d]\n", phys_enc->hw_wb->idx - WB_0); in dpu_encoder_phys_wb_needs_single_flush()
514 DPU_DEBUG("[wb:%d]\n", phys_enc->hw_wb->idx - WB_0); in dpu_encoder_phys_wb_handle_post_kickoff()
524 DPU_DEBUG("[wb:%d]\n", phys_enc->hw_wb->idx - WB_0); in dpu_encoder_phys_wb_enable()
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Ddpu_writeback.c40 DPU_DEBUG("[atomic_check:%d]\n", connector->base.id); in dpu_wb_conn_atomic_check()
65 DPU_DEBUG("[fb_id:%u][fb:%u,%u][mode:\"%s\":%ux%u]\n", fb->base.id, fb->width, fb->height, in dpu_wb_conn_atomic_check()
Ddpu_kms.c127 DPU_DEBUG("plane:%d img:%dx%d ", in _dpu_plane_set_danger_state()
130 DPU_DEBUG("src[%d,%d,%d,%d] dst[%d,%d,%d,%d]\n", in _dpu_plane_set_danger_state()
138 DPU_DEBUG("Inactive plane:%d\n", plane->base.id); in _dpu_plane_set_danger_state()
156 DPU_DEBUG("Disabling danger:\n"); in _dpu_plane_danger_write()
161 DPU_DEBUG("Enabling danger:\n"); in _dpu_plane_danger_write()
473 DPU_DEBUG("[crtc:%d] not enable\n", crtc->base.id); in dpu_kms_wait_for_commit_done()
478 DPU_DEBUG("[crtc:%d] not active\n", crtc->base.id); in dpu_kms_wait_for_commit_done()
813 DPU_DEBUG("Create plane type %d with features %lx (cur %lx)\n", in _dpu_kms_drm_obj_init()
1174 DPU_DEBUG("max core clk rate not determined, using default\n"); in dpu_kms_hw_init()
1305 DPU_DEBUG("VBIF NRT is not defined"); in dpu_kms_mmap_mdp5()
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Ddpu_rm.c248 DPU_DEBUG("lm %d already reserved\n", lm_idx + LM_0); in _dpu_rm_check_lm_and_get_connected_blks()
260 DPU_DEBUG("lm %d pp %d already reserved\n", lm_cfg->id, in _dpu_rm_check_lm_and_get_connected_blks()
276 DPU_DEBUG("lm %d dspp %d already reserved\n", lm_cfg->id, in _dpu_rm_check_lm_and_get_connected_blks()
342 DPU_DEBUG("unable to find appropriate mixers\n"); in _dpu_rm_reserve_lms()
388 DPU_DEBUG("ctl %d caps 0x%lX\n", j + CTL_0, features); in _dpu_rm_reserve_ctls()
394 DPU_DEBUG("ctl %d match\n", j + CTL_0); in _dpu_rm_reserve_ctls()
Ddpu_kms.h33 #define DPU_DEBUG(fmt, ...) \ macro
Ddpu_hw_lm.c168 DPU_DEBUG("skip mixer %d without pingpong\n", cfg->id); in dpu_hw_lm_init()
Ddpu_hw_intf.c531 DPU_DEBUG("enc%d intf%d disabled autorefresh\n", in dpu_hw_intf_disable_autorefresh()
558 DPU_DEBUG("Skip intf %d with type NONE\n", cfg->id - INTF_0); in dpu_hw_intf_init()
Ddpu_encoder_phys_cmd.c18 #define DPU_DEBUG_CMDENC(e, fmt, ...) DPU_DEBUG("enc%d intf%d " fmt, \
729 DPU_DEBUG("intf\n"); in dpu_encoder_phys_cmd_init()
Ddpu_hw_pingpong.c256 DPU_DEBUG("enc%d pp%d disabled autorefresh\n", in dpu_hw_pp_disable_autorefresh()
Ddpu_encoder.c1981 DPU_DEBUG("invalid FB not kicking off\n"); in dpu_encoder_is_valid_for_commit()
2191 DPU_DEBUG("[enc:%d] cdm_disable fmt:%p4cc\n", DRMID(phys_enc->parent), in dpu_encoder_helper_phys_setup_cdm()
2232 DPU_DEBUG("[enc:%d] cdm_enable:%d,%d,%p4cc,%d,%d,%d,%d]\n", in dpu_encoder_helper_phys_setup_cdm()
2373 DPU_DEBUG("dsi_info->num_of_h_tiles %d\n", disp_info->num_of_h_tiles); in dpu_encoder_setup_display()
2397 DPU_DEBUG("h_tile_instance %d = %d, split_role %d\n", in dpu_encoder_setup_display()
Ddpu_encoder_phys_vid.c17 #define DPU_DEBUG_VIDENC(e, fmt, ...) DPU_DEBUG("enc%d intf%d " fmt, \
Ddpu_plane.c1452 DPU_DEBUG("%s created for pipe:%u id:%u\n", plane->name, in dpu_plane_init()