/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn32/ |
D | dcn32_dccg.h | 57 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK0_EN, mask_sh),\ 58 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK1_EN, mask_sh),\ 59 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK2_EN, mask_sh),\ 60 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK3_EN, mask_sh),\ 61 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK0_SRC_SEL, mask_sh),\ 62 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK1_SRC_SEL, mask_sh),\ 63 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK2_SRC_SEL, mask_sh),\ 64 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK3_SRC_SEL, mask_sh),\
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D | dcn32_dccg.c | 290 REG_UPDATE_2(DPSTREAMCLK_CNTL, in dccg32_set_dpstreamclk() 295 REG_UPDATE_2(DPSTREAMCLK_CNTL, DPSTREAMCLK1_EN, in dccg32_set_dpstreamclk() 299 REG_UPDATE_2(DPSTREAMCLK_CNTL, DPSTREAMCLK2_EN, in dccg32_set_dpstreamclk() 303 REG_UPDATE_2(DPSTREAMCLK_CNTL, DPSTREAMCLK3_EN, in dccg32_set_dpstreamclk()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn314/ |
D | dcn314_dccg.h | 48 SR(DPSTREAMCLK_CNTL),\ 89 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK0_EN, mask_sh),\ 90 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK1_EN, mask_sh),\ 91 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK2_EN, mask_sh),\ 92 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK3_EN, mask_sh),\ 93 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK0_SRC_SEL, mask_sh),\ 94 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK1_SRC_SEL, mask_sh),\ 95 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK2_SRC_SEL, mask_sh),\ 96 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK3_SRC_SEL, mask_sh),\
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D | dcn314_dccg.c | 263 REG_UPDATE_2(DPSTREAMCLK_CNTL, in dccg314_set_dpstreamclk() 268 REG_UPDATE_2(DPSTREAMCLK_CNTL, in dccg314_set_dpstreamclk() 273 REG_UPDATE_2(DPSTREAMCLK_CNTL, in dccg314_set_dpstreamclk() 278 REG_UPDATE_2(DPSTREAMCLK_CNTL, in dccg314_set_dpstreamclk()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn401/ |
D | dcn401_dccg.h | 55 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK0_EN, mask_sh),\ 56 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK1_EN, mask_sh),\ 57 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK2_EN, mask_sh),\ 58 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK3_EN, mask_sh),\ 59 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK0_SRC_SEL, mask_sh),\ 60 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK1_SRC_SEL, mask_sh),\ 61 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK2_SRC_SEL, mask_sh),\ 62 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK3_SRC_SEL, mask_sh),\
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D | dcn401_dccg.c | 493 REG_UPDATE_2(DPSTREAMCLK_CNTL, in dccg401_enable_dpstreamclk() 502 REG_UPDATE_2(DPSTREAMCLK_CNTL, in dccg401_enable_dpstreamclk() 511 REG_UPDATE_2(DPSTREAMCLK_CNTL, in dccg401_enable_dpstreamclk() 520 REG_UPDATE_2(DPSTREAMCLK_CNTL, in dccg401_enable_dpstreamclk() 540 REG_UPDATE(DPSTREAMCLK_CNTL, in dccg401_disable_dpstreamclk() 548 REG_UPDATE(DPSTREAMCLK_CNTL, in dccg401_disable_dpstreamclk() 556 REG_UPDATE(DPSTREAMCLK_CNTL, in dccg401_disable_dpstreamclk() 564 REG_UPDATE(DPSTREAMCLK_CNTL, in dccg401_disable_dpstreamclk()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn35/ |
D | dcn35_dccg.h | 68 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK0_EN, mask_sh),\ 69 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK1_EN, mask_sh),\ 70 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK2_EN, mask_sh),\ 71 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK3_EN, mask_sh),\ 72 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK0_SRC_SEL, mask_sh),\ 73 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK1_SRC_SEL, mask_sh),\ 74 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK2_SRC_SEL, mask_sh),\ 75 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK3_SRC_SEL, mask_sh),\
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D | dcn35_dccg.c | 662 REG_UPDATE_2(DPSTREAMCLK_CNTL, DPSTREAMCLK0_EN, in dccg35_set_dpstreamclk_src_new() 668 REG_UPDATE_2(DPSTREAMCLK_CNTL, DPSTREAMCLK1_EN, in dccg35_set_dpstreamclk_src_new() 675 REG_UPDATE_2(DPSTREAMCLK_CNTL, DPSTREAMCLK2_EN, in dccg35_set_dpstreamclk_src_new() 682 REG_UPDATE_2(DPSTREAMCLK_CNTL, DPSTREAMCLK3_EN, in dccg35_set_dpstreamclk_src_new() 1438 REG_UPDATE_2(DPSTREAMCLK_CNTL, DPSTREAMCLK0_EN, in dccg35_set_dpstreamclk() 1444 REG_UPDATE_2(DPSTREAMCLK_CNTL, DPSTREAMCLK1_EN, in dccg35_set_dpstreamclk() 1450 REG_UPDATE_2(DPSTREAMCLK_CNTL, DPSTREAMCLK2_EN, in dccg35_set_dpstreamclk() 1456 REG_UPDATE_2(DPSTREAMCLK_CNTL, DPSTREAMCLK3_EN, in dccg35_set_dpstreamclk()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn31/ |
D | dcn31_dccg.c | 104 REG_UPDATE(DPSTREAMCLK_CNTL, in dccg31_enable_dpstreamclk() 108 REG_UPDATE(DPSTREAMCLK_CNTL, in dccg31_enable_dpstreamclk() 112 REG_UPDATE(DPSTREAMCLK_CNTL, in dccg31_enable_dpstreamclk() 116 REG_UPDATE(DPSTREAMCLK_CNTL, in dccg31_enable_dpstreamclk() 140 REG_UPDATE(DPSTREAMCLK_CNTL, in dccg31_disable_dpstreamclk() 144 REG_UPDATE(DPSTREAMCLK_CNTL, in dccg31_disable_dpstreamclk() 148 REG_UPDATE(DPSTREAMCLK_CNTL, in dccg31_disable_dpstreamclk() 152 REG_UPDATE(DPSTREAMCLK_CNTL, in dccg31_disable_dpstreamclk()
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D | dcn31_dccg.h | 43 SR(DPSTREAMCLK_CNTL),\ 95 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK_PIPE0_EN, mask_sh),\ 96 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK_PIPE1_EN, mask_sh),\ 97 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK_PIPE2_EN, mask_sh),\ 98 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK_PIPE3_EN, mask_sh),\
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn20/ |
D | dcn20_dccg.h | 399 uint32_t DPSTREAMCLK_CNTL; member
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn401/ |
D | dcn401_resource.h | 622 SR(DPSTREAMCLK_CNTL), SR(HDMISTREAMCLK_CNTL), \
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
D | dcn32_resource.h | 1236 SR(PHYESYMCLK_CLOCK_CNTL), SR(DPSTREAMCLK_CNTL), SR(HDMISTREAMCLK_CNTL), \
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