Searched refs:DPLL_DAC_SERIAL_P2_CLOCK_DIV_5 (Results 1 – 4 of 4) sorted by relevance
176 dpll |= DPLL_DAC_SERIAL_P2_CLOCK_DIV_5; in psb_intel_crtc_mode_set()
237 #define DPLL_DAC_SERIAL_P2_CLOCK_DIV_5 (1 << 24) /* i915 */ macro
456 clock.p2 = dpll & DPLL_DAC_SERIAL_P2_CLOCK_DIV_5 ? in i9xx_crtc_clock_get()1041 dpll |= DPLL_DAC_SERIAL_P2_CLOCK_DIV_5; in i9xx_dpll()1317 dpll |= DPLL_DAC_SERIAL_P2_CLOCK_DIV_5; in ilk_dpll()
696 #define DPLL_DAC_SERIAL_P2_CLOCK_DIV_5 (1 << 24) /* i915 */ macro