Searched refs:DMA_STATUS_REG (Results 1 – 10 of 10) sorted by relevance
844 case (DMA_STATUS_REG + DMA0_REGISTER_OFFSET): in cayman_get_allowed_info_register()845 case (DMA_STATUS_REG + DMA1_REGISTER_OFFSET): in cayman_get_allowed_info_register()1743 tmp = RREG32(DMA_STATUS_REG + DMA0_REGISTER_OFFSET); in cayman_gpu_check_soft_reset()1748 tmp = RREG32(DMA_STATUS_REG + DMA1_REGISTER_OFFSET); in cayman_gpu_check_soft_reset()
1330 #define DMA_STATUS_REG 0xd034 macro
1102 case DMA_STATUS_REG: in evergreen_get_allowed_info_register()3789 RREG32(DMA_STATUS_REG)); in evergreen_print_gpu_status_regs()3792 RREG32(DMA_STATUS_REG + 0x800)); in evergreen_print_gpu_status_regs()3847 tmp = RREG32(DMA_STATUS_REG); in evergreen_gpu_check_soft_reset()
1840 #define DMA_STATUS_REG 0xd034 macro
1297 case (DMA_STATUS_REG + DMA0_REGISTER_OFFSET): in si_get_allowed_info_register()1298 case (DMA_STATUS_REG + DMA1_REGISTER_OFFSET): in si_get_allowed_info_register()3782 tmp = RREG32(DMA_STATUS_REG + DMA0_REGISTER_OFFSET); in si_gpu_check_soft_reset()3787 tmp = RREG32(DMA_STATUS_REG + DMA1_REGISTER_OFFSET); in si_gpu_check_soft_reset()
181 case DMA_STATUS_REG: in r600_get_allowed_info_register()1583 RREG32(DMA_STATUS_REG)); in r600_print_gpu_status_regs()1646 tmp = RREG32(DMA_STATUS_REG); in r600_gpu_check_soft_reset()
2625 #define DMA_STATUS_REG 0xd034 macro
638 #define DMA_STATUS_REG 0xd034 macro
1119 {DMA_STATUS_REG + DMA0_REGISTER_OFFSET},1120 {DMA_STATUS_REG + DMA1_REGISTER_OFFSET},
1904 #define DMA_STATUS_REG 0x340d macro