Searched refs:DMA_SLAVE_BUSWIDTH_UNDEFINED (Results 1 – 25 of 25) sorted by relevance
116 DMA_SLAVE_BUSWIDTH_UNDEFINED; in snd_dmaengine_pcm_set_config_from_dai_data()117 if (dma_data->addr_width != DMA_SLAVE_BUSWIDTH_UNDEFINED) in snd_dmaengine_pcm_set_config_from_dai_data()124 DMA_SLAVE_BUSWIDTH_UNDEFINED; in snd_dmaengine_pcm_set_config_from_dai_data()125 if (dma_data->addr_width != DMA_SLAVE_BUSWIDTH_UNDEFINED) in snd_dmaengine_pcm_set_config_from_dai_data()
402 if ((sconfig->dst_addr_width == DMA_SLAVE_BUSWIDTH_UNDEFINED) || in sanitize_config()406 if (sconfig->src_addr_width == DMA_SLAVE_BUSWIDTH_UNDEFINED) in sanitize_config()415 if ((sconfig->src_addr_width == DMA_SLAVE_BUSWIDTH_UNDEFINED) || in sanitize_config()419 if (sconfig->dst_addr_width == DMA_SLAVE_BUSWIDTH_UNDEFINED) in sanitize_config()
1002 enum dma_slave_buswidth slave_bw = DMA_SLAVE_BUSWIDTH_UNDEFINED; in tegra_dma_prep_slave_sg()1120 enum dma_slave_buswidth slave_bw = DMA_SLAVE_BUSWIDTH_UNDEFINED; in tegra_dma_prep_dma_cyclic()
601 if (src_addr_width == DMA_SLAVE_BUSWIDTH_UNDEFINED) in set_config()606 if (dst_addr_width == DMA_SLAVE_BUSWIDTH_UNDEFINED) in set_config()
2709 if (dst_addr_width == DMA_SLAVE_BUSWIDTH_UNDEFINED) in d40_set_runtime_config_write()2725 if (src_addr_width == DMA_SLAVE_BUSWIDTH_UNDEFINED) in d40_set_runtime_config_write()2760 if (src_addr_width <= DMA_SLAVE_BUSWIDTH_UNDEFINED || in d40_set_runtime_config_write()2762 dst_addr_width <= DMA_SLAVE_BUSWIDTH_UNDEFINED || in d40_set_runtime_config_write()
696 enum dma_slave_buswidth width = DMA_SLAVE_BUSWIDTH_UNDEFINED; in mmp_pdma_config_write()
213 if (addr_width == DMA_SLAVE_BUSWIDTH_UNDEFINED) in fsl_edma_get_tcd_attr()
670 enum dma_slave_buswidth width = DMA_SLAVE_BUSWIDTH_UNDEFINED; in k3_dma_config_write()
91 (BIT(DMA_SLAVE_BUSWIDTH_UNDEFINED) | \
870 enum dma_slave_buswidth width = DMA_SLAVE_BUSWIDTH_UNDEFINED; in pxad_get_config()
495 (BIT(DMA_SLAVE_BUSWIDTH_UNDEFINED) |\
88 BIT(DMA_SLAVE_BUSWIDTH_UNDEFINED) | \
181 (BIT(DMA_SLAVE_BUSWIDTH_UNDEFINED) |\
2916 BIT(DMA_SLAVE_BUSWIDTH_UNDEFINED) | \
873 rx_conf.src_addr_width = DMA_SLAVE_BUSWIDTH_UNDEFINED; in configure_dma()889 tx_conf.dst_addr_width = DMA_SLAVE_BUSWIDTH_UNDEFINED; in configure_dma()903 if (rx_conf.src_addr_width == DMA_SLAVE_BUSWIDTH_UNDEFINED) in configure_dma()905 if (tx_conf.dst_addr_width == DMA_SLAVE_BUSWIDTH_UNDEFINED) in configure_dma()
241 return DMA_SLAVE_BUSWIDTH_UNDEFINED; in dw_spi_dma_convert_width()
930 dma_data_tx->addr_width = DMA_SLAVE_BUSWIDTH_UNDEFINED; in stm32_i2s_dai_probe()933 dma_data_rx->addr_width = DMA_SLAVE_BUSWIDTH_UNDEFINED; in stm32_i2s_dai_probe()
1194 sai->dma_params.addr_width = DMA_SLAVE_BUSWIDTH_UNDEFINED; in stm32_sai_dai_probe()
37 BIT(DMA_SLAVE_BUSWIDTH_UNDEFINED) | \
37 BIT(DMA_SLAVE_BUSWIDTH_UNDEFINED) | \815 if (reg_width == DMA_SLAVE_BUSWIDTH_UNDEFINED) in dwc_verify_p_buswidth()
384 DMA_SLAVE_BUSWIDTH_UNDEFINED = 0, enumerator
564 DMA_SLAVE_BUSWIDTH_UNDEFINED
1039 if (dev_width == DMA_SLAVE_BUSWIDTH_UNDEFINED) { in edma_prep_slave_sg()1328 if (dev_width == DMA_SLAVE_BUSWIDTH_UNDEFINED) { in edma_prep_dma_cyclic()
1788 ddev->src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_UNDEFINED); in xilinx_dpdma_probe()
311 if (width != DMA_SLAVE_BUSWIDTH_UNDEFINED) { in stm32_dma_fifo_threshold_is_allowed()