Searched refs:DMA_INTR_ENA (Results 1 – 4 of 4) sorted by relevance
22 #define DMA_INTR_ENA 0x0000101c /* Interrupt Enable */ macro44 #define DMA_CHAN_INTR_ENA(chan) dma_chan_base_addr(DMA_INTR_ENA, chan)
29 writel(DMA_INTR_DEFAULT_MASK, ioaddr + DMA_INTR_ENA); in dwmac100_dma_init()
214 u32 value = readl(ioaddr + DMA_INTR_ENA); in dwmac_dma_interrupt()
303 u32 value = readl(ioaddr + DMA_INTR_ENA); in loongson_dwmac_dma_interrupt()