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Searched refs:DISP_CC_MDSS_VSYNC1_CLK (Results 1 – 11 of 11) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Dqcom,sm4450-dispcc.h32 #define DISP_CC_MDSS_VSYNC1_CLK 22 macro
Dqcom,dispcc-sc8280xp.h84 #define DISP_CC_MDSS_VSYNC1_CLK 74 macro
Dqcom,x1e80100-dispcc.h79 #define DISP_CC_MDSS_VSYNC1_CLK 69 macro
Dqcom,sm8550-dispcc.h82 #define DISP_CC_MDSS_VSYNC1_CLK 72 macro
Dqcom,sm8650-dispcc.h82 #define DISP_CC_MDSS_VSYNC1_CLK 72 macro
Dqcom,sm8450-dispcc.h84 #define DISP_CC_MDSS_VSYNC1_CLK 74 macro
/linux-6.12.1/drivers/clk/qcom/
Ddispcc-sm4450.c697 [DISP_CC_MDSS_VSYNC1_CLK] = &disp_cc_mdss_vsync1_clk.clkr,
Ddispcc-sc8280xp.c2953 [DISP_CC_MDSS_VSYNC1_CLK] = &disp0_cc_mdss_vsync1_clk.clkr,
3035 [DISP_CC_MDSS_VSYNC1_CLK] = &disp1_cc_mdss_vsync1_clk.clkr,
Ddispcc-x1e80100.c1610 [DISP_CC_MDSS_VSYNC1_CLK] = &disp_cc_mdss_vsync1_clk.clkr,
Ddispcc-sm8450.c1708 [DISP_CC_MDSS_VSYNC1_CLK] = &disp_cc_mdss_vsync1_clk.clkr,
Ddispcc-sm8550.c1713 [DISP_CC_MDSS_VSYNC1_CLK] = &disp_cc_mdss_vsync1_clk.clkr,