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Searched refs:DISP_CC_MDSS_PCLK0_CLK_SRC (Results 1 – 25 of 45) sorted by relevance

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/linux-6.12.1/include/dt-bindings/clock/
Dqcom,dispcc-qcm2290.h24 #define DISP_CC_MDSS_PCLK0_CLK_SRC 14 macro
Dqcom,sm6115-dispcc.h25 #define DISP_CC_MDSS_PCLK0_CLK_SRC 15 macro
Dqcom,sm6375-dispcc.h25 #define DISP_CC_MDSS_PCLK0_CLK_SRC 14 macro
Dqcom,dispcc-sm6125.h31 #define DISP_CC_MDSS_PCLK0_CLK_SRC 22 macro
Dqcom,dispcc-sm6350.h35 #define DISP_CC_MDSS_PCLK0_CLK_SRC 24 macro
Dqcom,dispcc-sc7180.h34 #define DISP_CC_MDSS_PCLK0_CLK_SRC 25 macro
Dqcom,sm4450-dispcc.h26 #define DISP_CC_MDSS_PCLK0_CLK_SRC 16 macro
Dqcom,dispcc-sdm845.h26 #define DISP_CC_MDSS_PCLK0_CLK_SRC 16 macro
Dqcom,dispcc-sc7280.h42 #define DISP_CC_MDSS_PCLK0_CLK_SRC 32 macro
Dqcom,dispcc-sm8150.h47 #define DISP_CC_MDSS_PCLK0_CLK_SRC 37 macro
Dqcom,dispcc-sm8350.h47 #define DISP_CC_MDSS_PCLK0_CLK_SRC 37 macro
Dqcom,dispcc-sm8250.h47 #define DISP_CC_MDSS_PCLK0_CLK_SRC 37 macro
Dqcom,dispcc-sc8280xp.h76 #define DISP_CC_MDSS_PCLK0_CLK_SRC 66 macro
Dqcom,x1e80100-dispcc.h74 #define DISP_CC_MDSS_PCLK0_CLK_SRC 64 macro
Dqcom,sm8550-dispcc.h77 #define DISP_CC_MDSS_PCLK0_CLK_SRC 67 macro
Dqcom,sm8650-dispcc.h77 #define DISP_CC_MDSS_PCLK0_CLK_SRC 67 macro
Dqcom,sm8450-dispcc.h76 #define DISP_CC_MDSS_PCLK0_CLK_SRC 66 macro
/linux-6.12.1/drivers/clk/qcom/
Ddispcc-qcm2290.c479 [DISP_CC_MDSS_PCLK0_CLK_SRC] = &disp_cc_mdss_pclk0_clk_src.clkr,
Ddispcc-sm6375.c531 [DISP_CC_MDSS_PCLK0_CLK_SRC] = &disp_cc_mdss_pclk0_clk_src.clkr,
Ddispcc-sm6115.c544 [DISP_CC_MDSS_PCLK0_CLK_SRC] = &disp_cc_mdss_pclk0_clk_src.clkr,
Ddispcc-sm6125.c640 [DISP_CC_MDSS_PCLK0_CLK_SRC] = &disp_cc_mdss_pclk0_clk_src.clkr,
Ddispcc-sc7180.c667 [DISP_CC_MDSS_PCLK0_CLK_SRC] = &disp_cc_mdss_pclk0_clk_src.clkr,
Ddispcc-sm4450.c691 [DISP_CC_MDSS_PCLK0_CLK_SRC] = &disp_cc_mdss_pclk0_clk_src.clkr,
Ddispcc-sm6350.c716 [DISP_CC_MDSS_PCLK0_CLK_SRC] = &disp_cc_mdss_pclk0_clk_src.clkr,
Ddispcc-sdm845.c805 [DISP_CC_MDSS_PCLK0_CLK_SRC] = &disp_cc_mdss_pclk0_clk_src.clkr,

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