Searched refs:DIG_BE_CLK_CNTL (Results 1 – 5 of 5) sorted by relevance
| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dio/dcn35/ |
| D | dcn35_dio_link_encoder.c | 60 REG_GET(DIG_BE_CLK_CNTL, DIG_BE_CLK_EN, &enabled); in dcn35_is_dig_enabled()
70 REG_GET(DIG_BE_CLK_CNTL, DIG_BE_MODE, &value); in dcn35_get_dig_mode()
95 REG_UPDATE(DIG_BE_CLK_CNTL, DIG_BE_MODE, 0); in dcn35_link_encoder_setup()
100 REG_UPDATE(DIG_BE_CLK_CNTL, DIG_BE_MODE, 2); in dcn35_link_encoder_setup()
104 REG_UPDATE(DIG_BE_CLK_CNTL, DIG_BE_MODE, 3); in dcn35_link_encoder_setup()
108 REG_UPDATE(DIG_BE_CLK_CNTL, DIG_BE_MODE, 5); in dcn35_link_encoder_setup()
115 REG_UPDATE(DIG_BE_CLK_CNTL, DIG_BE_CLK_EN, 1); in dcn35_link_encoder_setup()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dio/dcn401/ |
| D | dcn401_dio_link_encoder.c | 133 REG_UPDATE(DIG_BE_CLK_CNTL, DIG_BE_MODE, 0); in dcn401_link_encoder_setup()
138 REG_UPDATE(DIG_BE_CLK_CNTL, DIG_BE_MODE, 2); in dcn401_link_encoder_setup()
142 REG_UPDATE(DIG_BE_CLK_CNTL, DIG_BE_MODE, 3); in dcn401_link_encoder_setup()
146 REG_UPDATE(DIG_BE_CLK_CNTL, DIG_BE_MODE, 5); in dcn401_link_encoder_setup()
153 REG_UPDATE(DIG_BE_CLK_CNTL, DIG_BE_CLK_EN, 1); in dcn401_link_encoder_setup()
163 REG_GET(DIG_BE_CLK_CNTL, DIG_BE_CLK_EN, &clk_enabled); in dcn401_is_dig_enabled()
173 REG_GET(DIG_BE_CLK_CNTL, DIG_BE_MODE, &value); in dcn401_get_dig_mode()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn35/ |
| D | dcn35_resource.h | 154 SRI_ARR(DIG_BE_CLK_CNTL, DIG, id),\
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dio/dcn10/ |
| D | dcn10_link_encoder.h | 171 uint32_t DIG_BE_CLK_CNTL; member
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn401/ |
| D | dcn401_resource.h | 229 SRI_ARR(DIG_BE_CLK_CNTL, DIG, id)
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