Searched refs:DDR3PHY_ZQ0SR0 (Results 1 – 2 of 2) sorted by relevance
43 #define DDR3PHY_ZQ0SR0 (0x188) /* ZQ status register 0 */ macro
565 tmp = readl(soc_pm.data.ramc_phy + DDR3PHY_ZQ0SR0); in at91_suspend_finish()