Home
last modified time | relevance | path

Searched refs:DDR2 (Results 1 – 15 of 15) sorted by relevance

/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dbrcm,bcm2835-cprman.txt26 - DSI0 DDR2 clock
29 - DSI1 DDR2 clock
/linux-6.12.1/arch/arm/boot/dts/arm/
Dvexpress-v2p-ca9.dts245 /* DDR2 SDRAM and Test Chip DDR2 I/O supply */
254 /* DDR2 SDRAM VTT termination voltage */
Dvexpress-v2p-ca5s.dts167 /* DDR2 */
Dvexpress-v2p-ca15-tc1.dts191 /* DDR2 PLL reference clock */
Dvexpress-v2p-ca15_a7.dts329 /* DDR2 PLL reference clock */
/linux-6.12.1/arch/arm/boot/dts/nxp/mxs/
Dimx28-eukrea-mbmx287lc.dts8 * Module contains : i.MX287 + 128MB DDR2 + NAND + 2 x Ethernet PHY + RTC
Dimx28-eukrea-mbmx283lc.dts8 * Module contains : i.MX282 + 64MB DDR2 + NAND + Ethernet PHY + RTC
/linux-6.12.1/arch/mips/pic32/
DKconfig28 internally packaged DDR2 memory up to 128MB.
/linux-6.12.1/Documentation/driver-api/memory-devices/
Dti-emif.rst30 supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
/linux-6.12.1/drivers/memory/
DKconfig97 supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
192 bool "Texas Instruments da8xx DDR2/mDDR driver"
195 This driver is for the DDR2/mDDR Memory Controller present on
/linux-6.12.1/Documentation/devicetree/bindings/memory-controllers/ti/
Demif.txt5 DDR2/DDR3/LPDDR2 protocols. This binding describes a given instance
/linux-6.12.1/drivers/cpufreq/
Ds5pv210-cpufreq.c116 DDR2 = 0x4, enumerator
/linux-6.12.1/arch/arm/boot/dts/ti/davinci/
Dda850-lcdk.dts24 /* 128 MB DDR2 SDRAM @ 0xc0000000 */
/linux-6.12.1/Documentation/driver-api/
Dedac.rst56 one 64 bits parallel access. Typically used with SDR, DDR, DDR2 and DDR3
/linux-6.12.1/arch/mips/
DKconfig1356 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller