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Searched refs:DDIV_DIVCTL_WEN (Results 1 – 1 of 1) sorted by relevance

/linux-6.12.1/drivers/clk/renesas/
Drzv2h-cpg.c48 #define DDIV_DIVCTL_WEN(shift) BIT((shift) + 16) macro
258 val = readl(divider->reg) | DDIV_DIVCTL_WEN(divider->shift); in rzv2h_ddiv_set_rate()