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Searched refs:DCP_REG (Results 1 – 5 of 5) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dce110/
Ddce110_compressor.c39 #define DCP_REG(reg)\ macro
80 status_pos = dm_read_reg(compressor->ctx, DCP_REG(mmCRTC_STATUS_POSITION)); in reset_lb_on_vblank()
84 if (status_pos != dm_read_reg(compressor->ctx, DCP_REG(mmCRTC_STATUS_POSITION))) { in reset_lb_on_vblank()
86 value = dm_read_reg(compressor->ctx, DCP_REG(mmLB_SYNC_RESET_SEL)); in reset_lb_on_vblank()
89 dm_write_reg(compressor->ctx, DCP_REG(mmLB_SYNC_RESET_SEL), value); in reset_lb_on_vblank()
91 frame_count = dm_read_reg(compressor->ctx, DCP_REG(mmCRTC_STATUS_FRAME_COUNT)); in reset_lb_on_vblank()
95 if (frame_count != dm_read_reg(compressor->ctx, DCP_REG(mmCRTC_STATUS_FRAME_COUNT))) in reset_lb_on_vblank()
103 value = dm_read_reg(compressor->ctx, DCP_REG(mmLB_SYNC_RESET_SEL)); in reset_lb_on_vblank()
106 dm_write_reg(compressor->ctx, DCP_REG(mmLB_SYNC_RESET_SEL), value); in reset_lb_on_vblank()
309 DCP_REG(mmGRPH_COMPRESS_SURFACE_ADDRESS_HIGH), in dce110_compressor_program_compressed_surface_address_and_pitch()
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Ddce110_timing_generator.c49 #define DCP_REG(reg) (reg + tg110->offsets.dcp) macro
1223 uint32_t address = DCP_REG(mmDCP_GSL_CONTROL); in dce110_timing_generator_setup_global_swap_lock()
1324 uint32_t address = DCP_REG(mmDCP_GSL_CONTROL); in dce110_timing_generator_tear_down_global_swap_lock()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dce112/
Ddce112_compressor.c38 #define DCP_REG(reg)\ macro
492 DCP_REG(mmGRPH_COMPRESS_SURFACE_ADDRESS_HIGH), in dce112_compressor_program_compressed_surface_address_and_pitch()
495 DCP_REG(mmGRPH_COMPRESS_SURFACE_ADDRESS), 0); in dce112_compressor_program_compressed_surface_address_and_pitch()
510 DCP_REG(mmGRPH_COMPRESS_SURFACE_ADDRESS_HIGH), in dce112_compressor_program_compressed_surface_address_and_pitch()
513 DCP_REG(mmGRPH_COMPRESS_SURFACE_ADDRESS), in dce112_compressor_program_compressed_surface_address_and_pitch()
528 dm_write_reg(compressor->ctx, DCP_REG(mmGRPH_COMPRESS_PITCH), 0); in dce112_compressor_program_compressed_surface_address_and_pitch()
536 dm_write_reg(compressor->ctx, DCP_REG(mmGRPH_COMPRESS_PITCH), value); in dce112_compressor_program_compressed_surface_address_and_pitch()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dce80/
Ddce80_timing_generator.c84 #define DCP_REG(reg) (reg + tg110->offsets.dcp) macro
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dce60/
Ddce60_timing_generator.c84 #define DCP_REG(reg) (reg + tg110->offsets.dcp) macro